Method for making semiconductor device including band-engineered superlattice
First Claim
1. A method for making a semiconductor device comprising:
- forming a superlattice comprising a plurality of stacked groups of layers; and
forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers;
each group of layers of the superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon;
the energy-band modifying layer comprising at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice has a higher charge carrier mobility in the parallel direction than would otherwise be present.
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Abstract
A method is for making a semiconductor device by forming a superlattice that, in turn, includes a plurality of stacked groups of layers. The method may also include forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. The energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise occur. The superlattice may also have a common energy band structure therein.
136 Citations
76 Claims
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1. A method for making a semiconductor device comprising:
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forming a superlattice comprising a plurality of stacked groups of layers; and
forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers;
each group of layers of the superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon;
the energy-band modifying layer comprising at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice has a higher charge carrier mobility in the parallel direction than would otherwise be present. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
forming source and drain regions laterally adjacent the superlattice channel; and
forming a gate overlying the superlattice channel.
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22. A method for making a semiconductor device comprising:
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forming a superlattice comprising a plurality of stacked groups of layers; and
forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers;
each group of layers of the superlattice comprising a plurality of stacked silicon atomic layers defining a silicon portion and an energy band-modifying layer thereon;
the energy-band modifying layer comprising at least one oxygen atomic layer constrained within a crystal lattice of adjacent silicon portions so that the superlattice has a higher charge carrier mobility in the parallel direction than would otherwise be present. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36)
forming source and drain regions laterally adjacent the superlattice channel; and
forming a gate overlying the superlattice channel.
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37. A method for making a semiconductor device comprising:
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forming a superlattice comprising a plurality of stacked groups of layers; and
forming regions adjacent the superlattice for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers;
each group of layers of the superlattice comprising less than eight stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon;
the energy-band modifying layer comprising a single non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice has a higher charge carrier mobility in the parallel direction than would otherwise be present. - View Dependent Claims (38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48)
forming source and drain regions laterally adjacent the superlattice channel; and
forming a gate overlying the superlattice channel.
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49. A method for making a semiconductor device comprising:
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forming a superlattice comprising a plurality of stacked groups of layers; and
forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers;
each group of layers of the superlattice comprising less than eight stacked silicon atomic layers defining a silicon portion and an energy band-modifying layer thereon;
the energy-band modifying layer comprising a single oxygen atomic layer constrained within a crystal lattice of adjacent silicon portions. - View Dependent Claims (50, 51, 52, 53, 54, 55, 56)
forming source and drain regions laterally adjacent the superlattice channel; and
forming a gate overlying the superlattice channel.
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57. A method for making a semiconductor device comprising:
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forming a superlattice comprising a plurality of stacked groups of layers; and
forming regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers;
each group of layers of the superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon;
the energy-band modifying layer comprising at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions so that the superlattice has a lower conductivity effective mass for charge carriers in the parallel direction than would otherwise be present. - View Dependent Claims (58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76)
forming source and drain regions laterally adjacent the superlattice channel; and
forming a gate overlying the superlattice channel.
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Specification