Efficient supply enhancement circuitry for power amplifiers

• US 6,831,519 B2
• Filed: 04/18/2003
• Issued: 12/14/2004
• Est. Priority Date: 06/03/2002
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Paragon Communications Limited
• Inventors: Bar-David, Israel, Blayvas, Ilya
• Primary Examiner(s): NGUYEN, PATRICIA T
• Application Number:
  US10/418,631
• Publication Number:
  US 20030231062A1
• Time in Patent Office: 606 Days
• Field of Search: 330/297, 330/296
• US Class Current: 330/297
• CPC Class Codes: H03F 1/0211 with control of the supply voltage or current
• CPC Class Codes: H03F 1/0244 Stepped control
• CPC Class Codes: H03F 2200/504 the supply voltage or current being continuously controlled by a controlling signal, e.g. the controlling signal of a transistor implemented as variable resistor in a supply path for, an IC-block showed amplifier

Abstract

Circuitry for allowing efficient pulse-type enhancement of the voltage supplied to a power amplifier fed by a power supply that is connected to the power amplifier at a first feeding point through a main supply path that is connected via a component having high impedance to an enhancement pulse at the feeding point, and to a second feeding point.

Claims

1. A method for allowing efficient pulse-type enhancement of the voltage supplied to a power amplifier fed by a power supply being connected to said power amplifier at a first feeding point through a main supply path connected via a component having a high impedance to an enhancement pulse at said feeding point, and to a second feeding point, comprising:

a) providing a supplementary supply path for providing enhance operating voltage to said power amplifier from one of said power supply and a second power supply;

b) providing a pair of a first and a second controllable impedances being connected by a common contact, each of which having a separate control input and being capable of being in a non-conducting state, and at least one of which is capable of being in a desired variable level of conduction, up to full conduction;

c) connecting one contact of said first controllable impedance to said second feeding point;

d) connecting one of said power supply and said second power supply across the contacts of said pair which are not connected at said common contact;

e) connecting a capacitor between said common contact and said first feeding point;

f) during the time period when no enhancement is required, simultaneously and separately controlling said first controllable impedance, through its separate control input, to be in its conducting state and effectively connect said common contact to said second feeding point of one of said power supply and said second power supply, and controlling said second controllable impedance, through its separate control input, to be in its non-conducting state and thereby, effectively disconnecting said common contact from said second feeding point and allowing said capacitor to charge to essentially the voltage of said power supply;

g) during the time period when enhancement is required;

g.1) controlling said first controllable impedance, through its separate control input, to effectively disconnect said common contact from one contact of said, or another power supply and;

g.2) simultaneously and separately, controlling said second controllable impedance, through its separate control input, to be in a conduction level that corresponds to a desired enhancement voltage level at said first feeding point, thereby increasing the magnitude of the voltage at said common point, to which a contact of said capacitor is connected, and thereby causing an essentially similar increase in the voltage at said first feeding point, to which the other contact of said capacitor is connected, up to said desired enhancement voltage level.

2. A method according to claim 1, wherein the controllable impedance comprises a bipolar transistor.

3. A method according to claim 1, wherein the controllable impedance comprises a FET.

4. A method according to claim 1, wherein the component comprises an inductor.

5. A method according to claim 1, wherein during the time period when enhancement is required, the first and/or the second controllable impedances are controlled by pulse signals having duration which is essentially similar to said time period.

6. Circuitry for allowing efficient pulse-type enhancement of the voltage supplied to a power amplifier fed by a power supply being connected to said power amplifier at a first feeding point through a main supply path connected via a component having a high impedance to an enhancement pulse at said feeding point, and to a second feeding point, comprising:

a) a supplementary supply path for providing enhanced operating voltage to said power amplifier from one of said power supply and a second power supply;

b) a pair of a first and a second controllable impedances being connected by a common contact, each of which having a separate control input and being capable of being in a non-conducting state and at least one of which is capable of being in a desired variable level of conduction, up to full conduction, one contact of said first controllable impedance being connected to said second feeding point;

c) one of a power supply and a second power supply, being connected across the contacts of said pair, which are not connected at said common contact, for providing enhanced operating voltage to said power amplifier;

d) a capacitor being connected between said common contact and said feeding point, for supplying at least a portion of said enhancement voltage through said feeding point during enhancement time period;

e) control circuitry, having at least two separate control ports, for simultaneously and separately, controlling said first controllable impedance, by a pulse-type control signal provided through its separate control input, to be in its conducting state and effectively connect said common contact to said second feeding point of one of said power supply and said second power supply, and said second controllable impedance, by another pulse-type control signal provided through its separate control input, to be in its non-conducting state, for causing said first controllable impedance to effectively disconnect said common contact from one contact of said, or another power supply during the time period when no enhancement is required, and

for simultaneously and separately, controlling said first controllable impedance, by a pulse-type control signal provided through its separate control input, to be in its non-conducting state and effectively disconnect said common contact from said second feeding point of said, or another power supply, and said second controllable impedance, through its separate control input, to be in a conduction level that corresponds to a desired enhancement voltage level at said first feeding point, during the time period when enhancement is required, such that the magnitude of the voltage at said common point is increased essentially up to said desired enhancement voltage level.

7. Circuitry according to claim 6, wherein the controllable impedance comprises a bipolar transistor.

8. Circuitry according to claim 6, wherein the controllable impedance comprises a FET.

9. Circuitry according to claim 6, wherein the component comprises an inductor.

10. Circuitry according to claim 6, wherein during the time period when enhancement is required, the first and/or the second controllable impedances are controlled by pulse signals having a duration which is essentially similar to said time period.