Apparatus and methods to achieve a variable color pixel border on a negative mode screen with a passive matrix drive
First Claim
1. A display unit comprising:
- a display passive matrix of independently controllable pixels comprising n rows and m columns of discrete pixels, said display matrix operable to generate an image in response to electronic signals driven from row and column drivers coupled thereto, said image representative of information stored in a frame buffer memory of a hardware abstraction layer; and
a pixel border surrounding said display matrix and comprising a plurality of pixels which are controlled to a color state by one or more unmapped locations of said frame buffer memory without a timing synchronization mechanism external from said hardware abstraction layer.
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Accused Products
Abstract
A display unit is constituted by a passive matrix of independently controllable pixels characterized by an active area of n rows and m columns of discrete pixels and a pixel border. The pixel border has a predetermined width, in one embodiment two pixels. The border pixel color state is controlled herein by the frame buffer memory. The pixel border color state is controlled to correspond to information contained in a frame buffer memory locus. This locus may be, in various embodiments herein, a single pixel, a row of pixels, or a number of rows of pixels of frame buffer memory. Each row of pixels may be equal to m and/or n. In one embodiment, the frame buffer controls the border pixels directly via a liquid crystal display controller and drivers, without a timing generation mechanism, such as a timing ASIC.
72 Citations
26 Claims
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1. A display unit comprising:
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a display passive matrix of independently controllable pixels comprising n rows and m columns of discrete pixels, said display matrix operable to generate an image in response to electronic signals driven from row and column drivers coupled thereto, said image representative of information stored in a frame buffer memory of a hardware abstraction layer; and
a pixel border surrounding said display matrix and comprising a plurality of pixels which are controlled to a color state by one or more unmapped locations of said frame buffer memory without a timing synchronization mechanism external from said hardware abstraction layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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13. A portable electronic device comprising:
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a processor coupled to a bus;
a memory unit coupled to said bus;
a user input device coupled to said bus; and
a display unit coupled to said bus and comprising;
a display passive matrix of independently controllable pixels comprising n rows and m columns of discrete pixels, said display matrix operable to generate an image in response to electronic signals driven from row and column drivers coupled thereto, said image representative of information stored in a frame buffer memory of a hardware abstraction layer; and
a pixel border surrounding said display matrix and comprising a plurality of pixels which are controlled to a color state by one or more unmapped locations of said frame buffer memory without a timing synchronization mechanism external from said hardware abstraction layer. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. In an electronic system comprising a hardware application layer with a frame buffer memory, and a negative display mode liquid crystal display with a passive matrix drive comprising a liquid crystal display controller, drivers, and a liquid crystal display matrix with an active pixel area and a pixel border, a method of controlling the color of said pixel border comprising:
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monitoring a locus within said frame buffer memory for information;
determining a color for said pixel border corresponding to said information;
generating a pixel border color signal corresponding to said color;
transferring said pixel border color signal to said liquid crystal display controller;
generating a pixel border color writing signal corresponding to said pixel border color signal; and
impelling said drivers to write a color to said pixel border according to said pixel border color writing signal, wherein said impelling said drivers to write a color to said pixel border accordingly does not involve a timing synchronization mechanism external from said hardware abstraction layer. - View Dependent Claims (26)
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Specification