Method and apparatus for mitigation of disturbers in communication systems
First Claim
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1. A method for reducing interference in a communication system, the method comprising:
- receiving a composite signal comprised of a main signal and at least one interfering signal;
performing a training operation comprising a frequency domain training and a time domain training operation;
performing a channel model identification comprising identifying the main signal and identifying the at least one interfering signal;
designing a compensation system to obtain an estimation of the at least one interfering signal;
performing a compensation operation of the at least one interfering signals using the compensation system; and
performing a final detection and adaptation of the main signal.
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Abstract
The present invention includes a method and system for compensating for cross-talk interference in communication systems. The method includes estimation of the interfering signals. Further, the method includes performing a compensation operation on at least one interfering signal.
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Citations
72 Claims
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1. A method for reducing interference in a communication system, the method comprising:
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receiving a composite signal comprised of a main signal and at least one interfering signal;
performing a training operation comprising a frequency domain training and a time domain training operation;
performing a channel model identification comprising identifying the main signal and identifying the at least one interfering signal;
designing a compensation system to obtain an estimation of the at least one interfering signal;
performing a compensation operation of the at least one interfering signals using the compensation system; and
performing a final detection and adaptation of the main signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
estimating a compensated signal-to-noise ratio of each of the at least one interfering signal; and
estimating a corresponding compensated bit loading.
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3. The method according to claim 2, wherein designing a compensation system further comprises:
selecting a set of interfering signals according to the estimated, compensated signal-to-noise ration of each of the at least one interfering signal.
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4. The method according to claim 3, wherein designing a compensation system further comprises:
determining a gain corresponding to the estimated bit loading of each signal of the set of interfering signals.
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5. The method according to claim 1, wherein estimating the at least one interfering signal is performed using a maximum likelihood sequence estimator.
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6. The method according to claim 1, wherein designing a compensation system further comprises approximating a signal constellation aggregated set corresponding to the at least one interfering signal.
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7. The method according to claim 6, wherein approximating the signal constellation aggregated set comprises determining a set of optimal cluster centers.
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8. The method according to claim 7, wherein determining the set of optimal cluster centers comprises calculating a set of centroids.
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9. The method according to claim 1, wherein designing a compensation system further comprises:
designing a equalizer in order to pre-filter the at least one interfering signal.
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10. The method according to claim 9, wherein the equalizer is a viterbi equalizer.
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11. The method according to claim 9, wherein designing the equalizer comprises:
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selecting a number of design parameters;
forming a set of convolution matrices of the at least one interfering signal;
forming a set of reduced matrices from the set of convolution matrices for a given delay window of the at least one interfering signal;
determining an equalizer parameter; and
determining a Least Square Metric for the equalizer parameter.
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12. The method according to claim 11, wherein selecting a number of design parameters comprises selecting a desired channel length of the at least one interfering signal.
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13. The method according to claim 11, wherein selecting a number of design parameters comprises selecting an equalizer filter length.
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14. The method according to claim 11, wherein selecting a number of design parameters comprises selecting a bit error rate for the at least one interfering signal.
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15. The method according to claim 11, wherein selecting a number of design parameters comprises selecting a relative weight factor in order to control the channel length.
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16. The method according to claim 11, wherein designing the equalizer further comprises evaluating the Least Square Metric of the equalizer.
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17. The method according to claim 11, wherein determining the equalizer parameter is performed using a joint least square method.
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18. The method according to claim 11, wherein determining the equalizer parameter is performed using a singular value decomposition method.
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19. The method according to claim 1, wherein designing a compensation system to obtain an estimation of the at least one interfering signal comprises processing the at least one interfering signal using a joint viterbi process.
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20. A computer readable medium containing executable instructions which, when executed in a processing system, cause said system to perform a method comprising:
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receiving a composite signal comprised of a main signal and at least one interfering signal;
performing a training operation comprising a frequency domain training and a time domain training operation;
performing a channel model identification comprising identifying the main signal and identifying the at least one interfering signal;
designing a compensation system to obtain an estimation of the at least one interfering signal;
performing a compensation operation of the at least one interfering signals using the compensation system; and
performing a final detection and adaptation of the main signal. - View Dependent Claims (21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38)
estimating a compensated signal-to-noise ratio of each of the at least one interfering signal; and
estimating a corresponding compensated bit loading.
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22. The computer readable medium according to claim 21, wherein designing a compensation system further comprises:
selecting a set of interfering signals according to the estimated, compensated signal-to-noise ration of each of the at least one interfering signal.
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23. The computer readable medium according to claim 22, wherein designing a compensation system further comprises:
determining a gain corresponding to the estimated bit loading of each signal of the set of interfering signals.
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24. The computer readable medium according to claim 20, wherein estimating the at least one interfering signal is performed using a maximum likelihood sequence estimator.
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25. The computer readable medium according to claim 20, wherein designing a compensation system further comprises approximating a signal constellation aggregated set corresponding to the at least one interfering signal.
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26. The computer readable medium according to claim 25, wherein approximating the signal constellation aggregated set comprises determining a set of optimal cluster centers.
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27. The computer readable medium according to claim 26, wherein determining the set of optimal cluster centers comprises calculating a set of centroids.
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28. The computer readable medium according to claim 20, wherein designing a compensation system further comprises:
designing a equalizer in order to pre-filter the at least one interfering signal.
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29. The computer readable medium according to claim 28, wherein the equalizer is a viterbi equalizer.
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30. The computer readable medium according to claim 28, wherein designing the equalizer comprises:
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selecting a number of design parameters;
forming a set of convolution matrices of the at least one interfering signal;
forming a set of reduced matrices from the set of convolution matrices for a given delay window of the at least one interfering signal;
determining an equalizer parameter; and
determining a Least Square Metric for the equalizer parameter.
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31. The computer readable medium according to claim 30, wherein selecting a number of design parameters comprises selecting a desired channel length of the at least one interfering signal.
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32. The computer readable medium according to claim 30, wherein selecting a number of design parameters comprises selecting an equalizer filter length.
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33. The computer readable medium according to claim 30, wherein selecting a number of design parameters comprises selecting a bit error rate for the at least one interfering signal.
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34. The computer readable medium according to claim 30, wherein selecting a number of design parameters comprises selecting a relative weight factor in order to control the channel length.
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35. The computer readable medium according to claim 30, wherein designing the equalizer further comprises evaluating the Least Square Metric of the equalizer.
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36. The computer readable medium according to claim 30, wherein determining the equalizer parameter is performed using a joint least square method.
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37. The computer readable medium according to claim 30, wherein determining the equalizer parameter is performed using a singular value decomposition method.
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38. The computer readable medium according to claim 20, wherein designing a compensation system to obtain an estimation of the at least one interfering signal comprises processing the at least one interfering signal using a joint viterbi process.
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39. An article of manufacture comprising a program storage medium readable by a computer and tangibly embodying at least one program of instructions executable by the computer to perform a method comprising:
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receiving a composite signal comprised of a main signal and at least one interfering signal;
performing a training operation comprising a frequency domain training and a time domain training operation;
performing a channel model identification comprising identifying the main signal and identifying the at least one interfering signal;
designing a compensation system to obtain an estimation of the at least one interfering signal;
performing a compensation operation of the at least one interfering signals using the compensation system; and
performing a final detection and adaptation of the main signal. - View Dependent Claims (40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57)
estimating a compensated signal-to-noise ratio of each of the at least one interfering signal; and
estimating a corresponding compensated bit loading.
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41. The article of manufacture according to claim 40, wherein designing a compensation system further comprises:
selecting a set of interfering signals according to the estimated, compensated signal-to-noise ration of each of the at least one interfering signal.
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42. The article of manufacture according to claim 41, wherein designing a compensation system further comprises:
determining a gain corresponding to the estimated bit loading of each signal of the set of interfering signals.
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43. The article of manufacture according to claim 39, wherein estimating the at least one interfering signal is performed using a maximum likelihood sequence estimator.
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44. The article of manufacture according to claim 39, wherein designing a compensation system further comprises approximating a signal constellation aggregated set corresponding to the at least one interfering signal.
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45. The article of manufacture according to claim 44, wherein approximating the signal constellation aggregated set comprises determining a set of optimal cluster centers.
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46. The article of manufacture according to claim 45, wherein determining the set of optimal cluster centers comprises calculating a set of centroids.
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47. The article of manufacture according to claim 39, wherein designing a compensation system further comprises:
designing a equalizer in order to pre-filter the at least one interfering signal.
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48. The article of manufacture according to claim 47, wherein the equalizer is a viterbi equalizer.
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49. The article of manufacture according to claim 47, wherein designing the equalizer comprises:
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selecting a number of design parameters;
forming a set of convolution matrices of the at least one interfering signal;
forming a set of reduced matrices from the set of convolution matrices for a given delay window of the at least one interfering signal;
determining an equalizer parameter; and
determining a Least Square Metric for the equalizer parameter.
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50. The article of manufacture according to claim 49, wherein selecting a number of design parameters comprises selecting a desired channel length of the at least one interfering signal.
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51. The article of manufacture according to claim 49, wherein selecting a number of design parameters comprises selecting an equalizer filter length.
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52. The article of manufacture according to claim 49, wherein selecting a number of design parameters comprises selecting a bit error rate for the at least one interfering signal.
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53. The article of manufacture according to claim 49, wherein selecting a number of design parameters comprises selecting a relative weight factor in order to control the channel length.
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54. The article of manufacture according to claim 49, wherein designing the equalizer further comprises evaluating the Least Square Metric of the equalizer.
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55. The article of manufacture according to claim 49, wherein designing a compensation system to obtain an estimation of the at least one interfering signal comprises processing the at least one interfering signal using a joint viterbi process.
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56. The article of manufacture according to claim 49, wherein determining the equalizer parameter is performed using a joint least square method.
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57. The article of manufacture according to claim 49, wherein determining the equalizer parameter is performed using a singular value decomposition method.
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58. A compensation method comprising:
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receiving a composite signal comprised of a main signal and at least one interfering signal;
designing a equalizer in order to pre-filter the at least one interfering signal, wherein designing the equalizer comprises;
selecting a number of design parameters;
forming a set of convolution matrices of the at least one interfering signal;
forming a set of reduced matrices from the set of convolution matrices for a given delay window of the at least one interfering signal;
determining an equalizer parameter; and
determining a Least Square Metric for the equalizer parameter. - View Dependent Claims (59, 60, 61, 62, 63, 64, 65, 66, 67)
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68. A compensation system comprising:
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a receiver for receiving a composite signal comprising a main signal and at least one interfering signals;
a removal module for removing the main signal form the composite signal;
a detection module for estimating the at least one interfering signal, wherein the detection module comprises an equalizer to pre-filter the at least one interfering signal; and
a second removal module for removing the at least one estimated interfering signal from the composite signal. - View Dependent Claims (69, 70, 71)
a time domain equalizer; and
a frequency domain equalizer.
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72. A system comprising:
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a receiver module for processing a received signal;
an identification module for identifying and estimating the received signal;
a bit loading module; and
a compensator module for estimating and compensating for at least one disturber of the received signal.
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Specification