Field emission display having porous silicon dioxide layer

• US 6,835,111 B2
• Filed: 11/26/2001
• Issued: 12/28/2004
• Est. Priority Date: 08/26/1998
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Ahn, Kie Y., Forbes, Leonard
• Primary Examiner(s): RAMSEY, KENNETH J
• Assistant Examiner(s): Santiago, Mariceli
• Application Number:
  US09/994,511
• Publication Number:
  US 20020053869A1
• Time in Patent Office: 1,128 Days
• Field of Search: 445/24
• US Class Current: 445/24
• CPC Class Codes: H01J 1/3044 Point emitters
• CPC Class Codes: H01J 9/025 of field emission cathodes

Abstract

A field emission display includes a substrate and a plurality of emitters formed on columns on the substrate. The display also includes a porous dielectric layer formed on the substrate and the columns. The porous dielectric layer has an opening formed about each of the emitters and has a thickness substantially equal to a height of the emitters above the substrate. The porous dielectric layer may be formed by oxidation of porous polycrystalline silicon. The display also includes an extraction grid formed substantially in a plane defined by respective tips of the plurality of emitters and having an opening surrounding each tip of a respective one of the emitters. The display further includes a cathodoluminescent-coated faceplate having a planar surface formed parallel to and near the plane of tips of the plurality of emitters. The porous dielectric layer results in columns having less capacitance compared to prior art displays. Accordingly, less electrical power is required to charge and discharge the columns in order to drive the emitters. As a result, the display is able to form luminous images while consuming reduced electrical power compared to prior art displays.

Claims

1. A method of fabricating a field emission display baseplate comprising:

forming columns on a substrate;

forming a layer of silicon on the columns and the substrate;

etching the silicon layer to form a layer of porous silicon having a porosity of greater than 50%;

oxidizing the porous silicon layer to form a layer of porous silicon dioxide;

planarizing the silicon dioxide layer;

forming an extraction grid on the porous silicon dioxide layer;

etching openings through the porous silicon dioxide and the extraction grid; and

forming emitters in the openings in the porous silicon dioxide and the extraction grid.

2. The method of claim 1 wherein the act of oxidizing the porous silicon layer to form a layer of porous silicon dioxide comprises oxidizing the porous silicon layer to form a layer of porous silicon dioxide having a relative dielectric constant of less than 3.

3. The method of claim 1 wherein the act of oxidizing the porous silicon layer to form a layer of porous silicon dioxide comprises oxidizing the porous silicon layer to form a layer of porous silicon dioxide having a relative dielectric constant of less than 1.6.

4. The method of claim 1 wherein the act of oxidizing the polycrystalline silicon layer comprises plasma oxidizing the polycrystalline silicon layer at a temperature in excess of 450°

C.

5. The method of claim 1 wherein the act of oxidizing the polycrystalline silicon layer comprises thermally oxidizing the polycrystalline silicon layer at a temperature in excess of 950°

C.

6. The method of claim 1 wherein the porous silicon dioxide layer is comprised of columnar silicon dioxide spacers with pores between the columnar spacers.

7. The method of claim 1 wherein the act of etching the silicon layer forms a porous silicon layer having at least 75% voids and the act of oxidizing the porous silicon layer forms a porous silicon dioxide layer having at least 61.5% voids.

8. The method of claim 7 wherein the porous silicon dioxide layer has a dielectric constant of less than 1.6.

9. The method of claim 1 wherein the act of oxidizing the porous silicon layer forms a porous silicon dioxide layer having at least 22.5% voids.

10. The method of claim 9 wherein the porous silicon dioxide layer has a dielectric constant of less than 3.

11. The method of claim 1 wherein the act of forming emitters comprises forming a high resistance emitter body of silicon monoxide and metal.

12. The method of claim 11 wherein the act of forming a high resistance emitter body comprises forming a high resistance emitter body by co-evaporation of silicon monoxide and a metal at an evaporation angle of 90 degrees with respect to the substrate surface.

13. The method of claim 1, further comprising, after the act of etching openings through the porous silicon dioxide and the extraction grid and prior to the act of forming emitters in the openings in the porous silicon dioxide and the extraction grid, forming a sacrificial layer on the extraction grid by angle evaporation.

14. The method of claim 13 wherein the act of forming a sacrificial layer on the extraction grid by angle evaporation comprises forming a sacrificial layer on the extraction grid by angle evaporation at an angle of seventy five degrees or more from a surface normal of the substrate.

15. The method of claim 13 wherein the act of forming emitters comprises:

forming emitter bodies by co-evaporating silicon monoxide and a metal; and

forming emitter tips by evaporating a material having a work function of less than four electron volts.

16. The method of claim 1 wherein the act of etching the silicon layer to form a layer of porous polycrystalline silicon comprises anodizing a polycrystalline silicon layer to form a layer of porous polycrystalline silicon.

17. The method of claim 16 wherein the act of oxidizing the porous polycrystalline silicon layer forms porous silicon dioxide layer having at least 22.5% voids.

18. The method of claim 17 wherein the porous silicon dioxide layer has a dielectric constant of less than 3.

19. The method of claim 16 wherein the act of etching the polycrystalline silicon layer forms a porous polycrystalline silicon layer having at least 75% voids and the act of oxidizing the porous polycrystalline silicon layer forms a porous silicon dioxide layer having at least 61.5% voids.

20. The method of claim 19 wherein the porous silicon dioxide layer has a dielectric constant of less than 1.6.

21. A method of claim 19 wherein the porous silicon dioxide layer has a dielectric constant of less than 1.6.

22. A method of fabricating a field emission display baseplate comprising:

forming conductors on a substrate;

forming a porous silicon dioxide layer to form a layer of porous silicon dioxide having a porosity of greater than 22.5% on the conductors and on the substrate, the porous silicon dioxide layer comprising columnar spacers of silicon dioxide with pores between the columnar spacers;

planarizing the silicon dioxide layer;

forming an extraction grid on the porous silicon dioxide layer;

etching openings through the silicon dioxide and the extraction grid; and

forming emitters in the openings in the porous silicon dioxide and the extraction grid.

23. The method of claim 22 wherein the act or forming emitters comprises forming a high resistance emitter body of silicon monoxide and metal.

24. The method of claim 23 wherein the act of forming a high resistance emitter body comprises forming a high resistance emitter body by co-evaporation of silicon monoxide and a metal at an evaporation angle of 90 degrees with respect to the substrate surface.

25. Tic method of claim 22 wherein the porous silicon layer comprises at least 50% voids.

26. The method of claim 22 wherein the porous silicon dioxide layer has a dielectric constant of less than 3.

27. The method of claim 22 wherein the porous silicon dioxide layer comprises at least 61.5% voids.

28. The method of claim 27 wherein the porous silicon dioxide layer has a dielectric constant of less than 1.6.

29. Tho method of claim 22 wherein forming the porous silicon dioxide layer comprises thermally oxidizing a porous silicon layer at temperature in excess of 950°

C.

30. The method of claim 22 wherein forming the porous silicon dioxide layer comprises plasma oxidizing a porous silicon layer at a temperature in excess of 450°

C.

31. The method of claim 22, further comprising after the act or etching openings through the porous silicon dioxide and the extraction grid and prior to the act of forming emitters in the openings in the porous silicon dioxide and the extraction grid, forming a sacrificial layer on the extraction grid by angle evaporation.

32. The method of claim 31 wherein the act of forming a sacrificial layer on the extraction grid by angle evaporation comprises forming a sacrificial layer on the extraction grid by angle evaporation at an angle of seventy five degrees or more from a surface normal of the substrate.

33. The method of claim 31 wherein the act of forming emitters comprises:

forming emitter bodies by co-evaporating silicon monoxide and a metal; and

forming emitter tips by evaporating a material having a work function of less than four electron volts.