Multi-layered gate for a CMOS imager
First Claim
1. A method of forming a multi-layered gate for use in an imaging device, comprising the steps of:
- providing a semiconductor substrate having a photosensitive region of a first conductivity type;
forming a first insulating layer on the semiconductor substrate and over the photosensitive region;
forming a first conductive layer over the first insulating layer;
forming a second insulating layer over the first conductive layer;
patterning at least the first conductive layer to form a first gate;
forming a third insulating layer over the semiconductor substrate;
forming a second conductive layer over the third insulating layer and at least a portion of the first conductive layer;
forming a second gate from the second conductive layer and the third insulating layer; and
forming a floating diffusion region of a second conductivity type in the substrate adjacent the first gate on a side of the first gate opposite the second gate.
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Abstract
A multi-layered gate for use in a CMOS or CCD imager formed with a second gate at least partially overlapping it. The multi-layered gate is a complete gate stack having an insulating layer, a conductive layer, an optional silicide layer, and a second insulating layer, and has a second gate formed adjacent to it which has a second conductive layer that extends at least partially over the surface of the multi-layered gate. The multi-layered gate has improved insulation, thereby resulting in fewer shorts between the conductive layers of the two gates. Also disclosed are processes for forming the multi-layered gate and the overlapping gate.
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Citations
35 Claims
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1. A method of forming a multi-layered gate for use in an imaging device, comprising the steps of:
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providing a semiconductor substrate having a photosensitive region of a first conductivity type;
forming a first insulating layer on the semiconductor substrate and over the photosensitive region;
forming a first conductive layer over the first insulating layer;
forming a second insulating layer over the first conductive layer;
patterning at least the first conductive layer to form a first gate;
forming a third insulating layer over the semiconductor substrate;
forming a second conductive layer over the third insulating layer and at least a portion of the first conductive layer;
forming a second gate from the second conductive layer and the third insulating layer; and
forming a floating diffusion region of a second conductivity type in the substrate adjacent the first gate on a side of the first gate opposite the second gate. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method of forming a stacked photogate for use in an imaging device, comprising the steps of:
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providing a semiconductor substrate having a photosensitive region of a first conductivity type;
forming a first insulating layer on the substrate and over the photosensitive region;
forming a first conductive layer over the first insulating layer adjacent to the photosensitive region;
forming a second insulating layer over the first conductive layer;
patterning the first conductive layer and the second insulating layer to form a transfer gate and a reset gate for a reset transistor;
forming insulating spacers on the sides of the transfer gate;
forming a second conductive layer over the photosensitive region and extending over at least a portion of the transfer gate;
forming a floating diffusion region of a second conductivity type between the transfer gate and the reset gate in the substrate, the floating diffusion region being the source of the reset transistor; and
forming a doped region of a second conductivity type adjacent to the reset gate, the doped region being the drain of the reset transistor. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35)
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Specification