Packaged microelectronic components

• US 6,836,009 B2
• Filed: 08/28/2002
• Issued: 12/28/2004
• Est. Priority Date: 08/08/2002
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Poo, Chia Yong, Koon, Eng Meow, Waf, Low Siu, Wei, Zhou, Yu, Chan Min, Leng, Ser Bok
• Primary Examiner(s): JACKSON JR, JEROME
• Application Number:
  US10/230,761
• Publication Number:
  US 20040026773A1
• Time in Patent Office: 853 Days
• Field of Search: 257/786, 257/724, 257/692, 257/696, 257/735, 257/666, 257/690, 257/775, 257/777, 257/784, 257/686
• US Class Current: 257/692
• CPC Class Codes: H01L 21/4842 Mechanical treatment, e.g. punching, cutting, deforming, cold welding
• CPC Class Codes: H01L 22/10 Measuring as part of the manufacturing process burn-in G01R31/2855
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/06136 Covering only the central area of the surface to be connected, i.e. central arrangements
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/4824 Connecting between the body and an opposite side of the item with respect to the body
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/4826 Connecting between the body and an opposite side of the item with respect to the body
• CPC Class Codes: H01L 2224/49171 Fan-out arrangements
• CPC Class Codes: H01L 2224/73215 Layer and wire connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2225/1029 the support being a lead frame
• CPC Class Codes: H01L 2225/1058 Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/3107 : the device being completely enclosed
• CPC Class Codes: H01L 23/3114 : the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/4951 : Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
• CPC Class Codes: H01L 23/49551 : characterised by bent parts
• CPC Class Codes: H01L 24/06 : of a plurality of bonding areas
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 25/03 : all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 25/50 : Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/1815 : Shape
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A microelectronic component package includes a plurality of electrical leads which are coupled to a microelectronic component and which have exposed lengths extending outwardly beyond a peripheral edge of an encapsulant. A plurality of terminals may be positioned proximate a terminal face of the encapsulant and these terminals may be electrically coupled to the same leads. This can facilitate connection of the microelectronic component to a substrate using the leads as a conventional leaded package. The terminals, however, can facilitate stacking of the leaded package with one or more additional microelectronic components, e.g., a BGA package.

Claims

1. A microelectronic component package, comprising:

a single semiconductor die;

an encapsulant encapsulating the semiconductor die, the encapsulant having a face and a peripheral edge;

a plurality of electrical leads, at least some of which are electrically coupled to the semiconductor die, each of the electrical leads having an exposed length extending transversely outwardly beyond the peripheral edge of the encapsulant; and

a plurality of terminals arranged in a first terminal array, each of the terminals being positioned proximate the face of the encapsulant and having a width different from a width of the lead.

2. The microelectronic component package of claim 1 wherein the exposed lengths of the electrical leads are arranged in an array adapted to be inserted in a socket array on a substrate.

3. The microelectronic component package of claim 1 wherein each of the terminals is electrically coupled to one of the electrical leads at a location spaced from the exposed length of the lead.

4. The microelectronic component package of claim 1 wherein each of the terminals comprises an exposed surface of one of the electrical leads.

5. The microelectronic component package of claim 1 wherein each of the terminals comprises an exposed surface of one of the electrical leads, the exposed surface of each lead being spaced from the exposed length of the lead.

6. The microelectronic component package of claim 1 wherein each of the terminals is recessed from the face of the encapsulant and is electrically coupled to one of the electrical leads.

7. The microelectronic component package of claim 1 wherein each of the electrical leads includes an encapsulated end adjacent a contact on the semiconductor die and a terminal offset, the encapsulated end being spaced farther from the face of the encapsulant than is the terminal offset.

8. The microelectronic component package of claim 7 wherein each of the terminals is associated with the terminal offset of one of the leads.

9. The microelectronic component package of claim 7 wherein each of the terminals comprises an exposed surface of the terminal offset of one of the leads.

10. The microelectronic component package of claim 7 wherein each of the terminal offsets has a surface coplanar with the face of the encapsulant and each terminal comprises the coplanar surface of one of the terminal offsets.

11. The microelectronic component package of claim 1 wherein at least one of the electrical leads is not electrically coupled to the semiconductor die, but is electrically associated with one of the terminals.

12. The microelectronic component package of claim 1 wherein one of the electrical leads comprises a first chip select lead electrically coupled to a contact on the semiconductor die and another of the electrical leads is a second chip select lead which is not electrically coupled to the semiconductor die, but is electrically associated with one of the terminals.

13. The microelectronic component package of claim 1 further comprising a second microelectronic component having a plurality of second terminals arranged in a second terminal array that is electrically coupled to the first terminal array.

14. The microelectronic component package of claim 1 further comprising a BGA package having a plurality of solder connections, each of which is electrically coupled to one of the terminals of the first terminal array.

15. The microelectronic component package of claim 1 further comprising a flip chip having a plurality of solder connections, each of which is electrically coupled to one of the terminals of the first terminal array.

16. A microelectronic component package, comprising:

a microelectronic component;

an encapsulant encapsulating the microelectronic component, the encapsulant having a face and a peripheral edge;

a plurality of electrical lead means for electrically coupling the microelectric component to a substrate, the electrical lead means having exposed lengths extending transversely outwardly beyond the peripheral edge of the encapsulant for insertion in a socket on the substrate, wherein first and second ones of the exposed lenghts are positioned side-by-side one another in a longitudinal direction; and

a plurality of terminal means arranged in a first terminal array, each of the terminal means being positioned proximate the face of the encapsulant and having a surface closer to the face of the encaosulant than is a surface of the microelectronic component, wherein a first one of the terminal means is associated with the first exposed length, a second one of the terminal means is associated with the second exposed length, and the first and second terminal means define a transversely aligned pair of terminal means.

17. The microelectronic component package of claim 16 wherein the exposed lengths of the electrical lead means are arranged in an array adapted to be inserted in a socket means on a substrate.

18. The microelectronic component package of claim 16 wherein each of the terminal means is electrically coupled to one of the electrical lead means at a location spaced from the exposed length of the lead means.

19. The microelectronic component package of claim 16 wherein each of the terminal means comprises an exposed surface of one of the electrical lead means.

20. The microelectronic component package of claim 16 wherein each of the terminal means comprises an exposed surface of one of the electrical lead means, the exposed surface of each lead being spaced from the exposed length of the lead means.

21. The microelectronic component package of claim 16 wherein each of the terminal means is recessed from the face of the encapsulant and is electrically coupled to one of the electrical lead means.

22. The microelectronic component package of claim 16 wherein each of the electrical lead means includes an encapsulated end adjacent a contact on the microelectronic component and a terminal offset, the encapsulated end being spaced farther from the face of the encapsulant than is the terminal offset.

23. The microelectronic component package of claim 22 wherein each of the terminal means is associated with the terminal offset of one of the lead means.

24. The microelectronic component package of claim 22 wherein each of the terminal means comprises an exposed surface of the terminal offset of one of the lead means.

25. The microelectronic component package of claim 22 wherein each of the terminal offsets has a surface coplanar with the face of the encapsulant and each terminal means comprises the coplanar surface of one of the terminal offsets.

26. The microelectronic component package of claim 16 wherein at least one of the electrical lead means is not electrically coupled to the microelectronic component, but is electrically associated with one of the terminal means.

27. The microelectronic component package of claim 16 wherein one of the electrical lead means comprises a first chip select lead electrically coupled to a contact on the microelectronic component and another of the electrical lead means is a second chip select lead which is not electrically coupled to the microelectronic component, but is electrically associated with one of the terminal means.

28. The microelectronic component package of claim 16 further comprising a second microelectronic component having a plurality of second terminals arranged in a second terminal array that is electrically coupled to the first terminal array.

29. The microelectronic component package of claim 16 further comprising a flip chip having a plurality of solder connections, each of which is electrically coupled to one of the terminals of the first terminal array.

30. The microelectronic component package of claim 16 further comprising a BGA package having a plurality of solder connections, each of which is electrically coupled to one of the terminals of the first terminal array.

31. A microelectronic component assembly comprising:

a substrate having a mounting site, a first socket adjacent the mounting site, and a second socket adjacent the mounting site; and

a first microelectronic component package mounted on the mounting site, the first microelectronic component package comprising;

a microelectronic component having a surface and a periphery;

an encapsulant encapsulating the microelectronic component, the encapsulant having a peripheral edge and a face that is oriented away from the substrate;

a first electrical lead electrically coupled to the microelectronic component and having an exposed length extending transversely outwardly beyond the peripheral edge of the encapsulant, the exposed length being electrically coupled to the first socket;

a second electrical lead electrically coupled to the microelectronic component and having an exposed length extending transversely outwardly beyond the peripheral edge of the encapsulant, the exposed length being electrically coupled to the second socket;

a first terminal proximate the face of the encapsulant and associated with the first electrical lead; and

a second terminal proximate the face of the encapsulant and associated with the second electrical lead, at least one of the first and second terminals being disposed within the periphery of the microelectronic component at a location between the surface of the microelectronic component and the face of the encapsulant.

32. The microelectronic component assembly of claim 31 wherein the substrate comprises a printed circuit board.

33. The microelectronic component assembly of claim 31 wherein each of the terminals is electrically coupled to one of the electrical leads at a location spaced from the exposed length of the lead.

34. The microelectronic component assembly of claim 31 wherein each of the terminals comprises an exposed surface of one of the electrical leads.

35. The microelectronic component assembly of claim 31 wherein each of the terminals comprises an exposed surface of one of the electrical leads, the exposed surface of each lead being spaced from the exposed length of the lead.

36. The microelectronic component assembly of claim 31 wherein each of the terminals is recessed from the face of the encapsulant and is electrically coupled to one of the electrical leads.

37. The microelectronic component assembly of claim 31 wherein each of the electrical leads includes an encapsulated end adjacent a contact on the microelectronic component and a terminal offset, the encapsulated end being spaced farther from the face of the encapsulant than is the terminal offset.

38. The microelectronic component assembly of claim 37 wherein each of the terminals is associated with the terminal offset of one of the leads.

39. The microelectronic component assembly of claim 37 wherein each of the terminals comprises an exposed surface of the terminal offset of one of the leads.

40. The microelectronic component assembly of claim 37 wherein each of the terminal offsets has a surface coplanar with the face of the encapsulant and each terminal comprises the coplanar surface of one of the terminal offsets.

41. The microelectronic component assembly of claim 31 wherein at least one of the electrical leads is not electrically coupled to the microelectronic component, but is electrically associated with one of the terminals.

42. The microelectronic component assembly of claim 31 further comprising a second microelectronic component electrically coupled to the first terminal and to the second terminal.

43. The microelectronic component assembly of claim 31 further comprising a second microelectronic component having a first bond pad electrically coupled to the first terminal and a second bond pad electrically coupled to the second terminal.

44. The microelectronic component assembly of claim 31 further comprising a second microelectronic component having a first bond pad electrically coupled to the first terminal by a first solder connection and a second bond pad electrically coupled to the second terminal by a second solder connection.

45. The microelectronic component assembly of claim 31 further comprising a second microelectronic component package comprising:

a second microelectronic component;

an encapsulant encapsulating the second microelectronic component, the encapsulant having a peripheral edge and a confronting face that is oriented toward the substrate;

a first electrical lead electrically coupled to the second microelectronic component and electrically coupled to the first terminal of the first microelectronic component package; and

a second electrical lead electrically coupled to the second microelectronic component and electrically coupled to the second terminal of the first microelectronic component package.

46. A microelectronic component assembly comprising:

a substrate having a mounting site, a first socket adjacent the mounting site, and a second socket adjacent the mounting site;

a first microelectronic component package mounted on the mounting site, the first microelectronic component package comprising;

a first microelectronic component;

an encapsulant encapsulating the first microelectronic component, the encapsulant having a peripheral edge and a face that is oriented away from the substrate;

first and second electrical leads, at least one of which is electrically coupled to the first microelectronic component, each of the first and second electrical leads having an exposed length extending transversely outwardly beyond the peripheral edge of the encapsulant, the exposed length of the first electrical lead and the exposed length of the second electrical lead being adjacent to one another in a longitudinal direction; and

first and second terminals positioned proximate the face of the encapsulant and electrically coupled to one of the electrical leads, wherein the first terminal comprises an exposed surface of the first electrical lead, the second terminal comprises an exposed surface of the second electrical lead, and the first and second terminals are aligned transversely; and

a second microelectronic component carried by the first microelectronic component package and electrically coupled to the substrate via the electrical leads of the first microelectronic component package.

47. The microelectronic component assembly of claim 46 wherein the second microelectronic component is connected to the first microelectronic component package by a plurality of solder connections, one of the solder connections being electrically coupled to the first terminal and another of the solder connections being electrically coupled to the second terminal.

48. The microelectronic component assembly of claim 46 wherein the first microelectronic component and the second microelectronic component each comprise a memory module.

49. The microelectronic component assembly of claim 46 wherein the second microelectronic component comprises a flip chip having a plurality of solder connections, one of which is electrically coupled to the first terminal and another of which is electrically coupled to the second terminal.

50. The microelectronic component assembly of claim 46 wherein the second microelectronic component comprises a BGA package having a plurality of solder connections, each of which is electrically coupled to one of the terminals of the first terminal array.

51. The microelectronic component assembly of claim 46 wherein the second microelectronic component is incorporated in a second microelectronic component package, the second microelectronic component package further comprising:

an encapsulant encapsulating the second microelectronic component, the encapsulant having a confronting face that is oriented toward the substrate; and

a plurality of electrical leads, at least some of which are electrically coupled to the second microelectronic component, wherein one of the electrical leads is electrically coupled to the first terminal of the first microelectronic component package and another of the electrical leads is electrically coupled to the second terminal of the first microelectronic component package.

52. The microelectronic component assembly of claim 46 wherein one of the electrical leads comprises a first chip select lead electrically coupled to a contact on the first microelectronic component and another of the electrical leads is a second chip select lead which is not electrically coupled to the first microelectronic component, but is electrically coupled to the second microelectronic component via one of the terminals.

53. A microelectronic component assembly comprising:

a substrate having a mounting site, a first socket adjacent the mounting site, and a second socket adjacent the mounting site;

a first microelectronic component package mounted on the mounting site, the first microelectronic component package comprising;

a first microelectronic component;

a first encapsulant encapsulating the first microelectronic component, the first encapsulant having a peripheral edge and a face that is oriented away from the substrate;

a plurality of first electrical leads, at least some of which are electrically coupled to the first microelectronic component, each of the first electrical leads having an exposed length extending transversely outwardly beyond the peripheral edge of the first encapsulant; and

a plurality of first terminals that are defined by an exposed surface of one of the first electrical leads, the first terminals being positioned proximate the face of the first encapsulant; and

a second microelectronic component package carried by the first microelectronic component package and electrically coupled to the substrate via the first electrical leads, the second microelectronic component package comprising;

a second microelectronic component;

a second encapsulant encapsulating the second microelectronic component, the second encapsulant having a peripheral edge and a confronting face, the confronting face of the second encapsulant facing the face of the first encapsulant;

a plurality of second electrical leads, at least some of which are electrically coupled to the second microelectronic component, each of the second electrical leads having an exposed length extending transversely outwardly beyond the peripheral edge of the second encapsulant; and

a plurality of second terminals that are defined by an exposed surface of one of the electrical leads, the second terminals being positioned proximate the face of the second encapsulant, wherein the second terminals are directly coupled to the first terminals.