Stress relieved contact array
First Claim
1. An interconnect between a semiconductor device tester and a plurality of semiconductor devices on a semiconductor wafer, comprisinga substrate, a plurality of signal traces on said substrate for communication with the semiconductor device tester, a plurality of signal pads on said substrate in communication with ones of said plurality of signal traces, a plurality of contacts extending from and in signal communication with ones of said plurality of signal pads, a stress relief portion on said plurality of contacts, an accessible contact end on said plurality of contacts, and resilient means for encapsulating and supporting said plurality of contacts, wherein said stress relief portion comprises a laterally extending U-shaped member spaced from said substrate.
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Accused Products
Abstract
A large array probe/contact having spring characteristics for relieving stress in the contact caused, for example, by temperature change is fabricated using a unique combination of semiconductor fabrication operations. The contacts in the array have a “U” shaped resilient portion, are fixed at one end to a substrate and have an accessible low electrical noise contact tip. The contacts are encapsulated on the substrate in an elastomer to provide additional stress relief resilience, support and protection from damage during handling.
16 Citations
10 Claims
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1. An interconnect between a semiconductor device tester and a plurality of semiconductor devices on a semiconductor wafer, comprising
a substrate, a plurality of signal traces on said substrate for communication with the semiconductor device tester, a plurality of signal pads on said substrate in communication with ones of said plurality of signal traces, a plurality of contacts extending from and in signal communication with ones of said plurality of signal pads, a stress relief portion on said plurality of contacts, an accessible contact end on said plurality of contacts, and resilient means for encapsulating and supporting said plurality of contacts, wherein said stress relief portion comprises a laterally extending U-shaped member spaced from said substrate.
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6. A stress relieved interconnect assembly for simultaneously contacting access pads on a plurality of semiconductor devices and for transmitting signals therethrough, comprising
a substrate, a plurality of accessible signal traces on said substrate, a plurality of signal pads on said substrate in communication with ones of said plurality of accessible signal traces, a plurality of contacts extending from and in signal communication with ones of said plurality of signal pads, a stress relief portion on said plurality of contacts, an accessible contact end on said plurality of contacts, and resilient means for encapsulating and supporting said plurality of contacts, wherein said stress relief portion comprises a laterally extending U-shaped member spaced from said substrate.
Specification
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Current AssigneeDonald M. Macintyre
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Original AssigneeDonald M. Macintyre
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InventorsMacIntyre, Donald M.
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Primary Examiner(s)Zarneke, David
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Assistant Examiner(s)KOBERT, RUSSELL MARC
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Application NumberUS10/233,727Publication NumberTime in Patent Office854 DaysField of Search324/754, 324/755, 324/757, 324/758, 324/765, 439/65, 439/66, 439/91US Class Current324/754.07CPC Class CodesG01R 31/2886 Features relating to contac...H05K 3/326 the printed circuit having ...H05K 3/4092 Integral conductive tabs, i...
