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Refresh controller and address remapping circuit and method for dual mode full/reduced density DRAMs

  • US 6,839,300 B2
  • Filed: 04/08/2003
  • Issued: 01/04/2005
  • Est. Priority Date: 03/08/2001
  • Status: Expired due to Fees
First Claim
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1. A method of addressing a memory device having a high density operating mode and a low density operating mode, the method comprising:

  • receiving a first set of row address bits and a specific row address bit;

    storing the specific row address bit;

    receiving a first set of column address bits and a specific column address bit;

    determining the operating mode of the memory device;

    in the high density operating mode, selecting the first set of column address bits and the specific column address bit;

    in the low density operating mode, selecting the first set of column address bits and the specific row address bit; and

    addressing a column of the memory device using the selected address bits.

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