Flip chip mounting method which avoids void formation between a semiconductor chip and a substrate

• US 6,841,415 B2
• Filed: 04/13/2001
• Issued: 01/11/2005
• Est. Priority Date: 04/14/2000
• Status: Active Grant

• Current Assignee: Namics Corporation
• Original Assignee: Namics Corporation
• Inventors: Yoshii, Haruyuki, Suzuki, Kenichi, Suzuki, Osamu
• Primary Examiner(s): NGUYEN, THANH T
• Application Number:
  US10/240,806
• Publication Number:
  US 20030059978A1
• Time in Patent Office: 1,369 Days
• Field of Search: 438/127, 438106-108, 438612-614
• US Class Current: 438/106
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/13109 Indium [In] as principal constituent
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/29007 Layer connector smaller than the underlying bonding area
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/2919 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/83192 wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01012 Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/01019 : Potassium [K]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01045 : Rhodium [Rh]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01083 : Bismuth [Bi]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1579 : with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy

Abstract

The present invention is to provide a flip chip mounting method which does not cause void formation between a semiconductor chip and a substrate, and in the flip chip mounting method, the method comprising the steps of: (A) drying the substrate; and (B) at least one step of: (1) dispensing uncured sealant at least at a bump pressing portion on the surface of the substrate and/or the entire portion of the substrate where minute irregularities are present; and (2) performing a pressing and the curing of the underfill while maintaining the temperature conditions so that a temperature difference between the semiconductor chip and the substrate does not cause convection substantially in the uncured or curing underfill.

Claims

1. A flip chip mounting method in which a semiconductor chip having a bump is pressed against a substrate so that the bump of the semiconductor chip faces the substrate or a semiconductor chip having no bump is pressed against a substrate having a bump on the surface and/or having a finely uneven surface due to a wiring pattern to seal up the gap between the semiconductor chip and the substrate using an underfill, the method comprising the steps of:

(A) drying the substrate; and

(B) dispensing uncured underfill at least at an entire portion of a bump pressing portion on the surface of the substrate and/or the entire portion of the substrate where minute irregularities are present; and

(C) performing a pressing and the curing of the underfill while maintaining the temperature conditions so that a temperature difference between the semiconductor chip and the substrate 200°

K or lower.

2. The mounting method according to claim 1, wherein the dispensed uncured underfill has a volatile component which volatiles at a pressing and curing temperature of 1.0% by weight or less.

3. The mounting method according to claim 1, wherein the pressing is made by solder bonding.

4. The mounting method according to claim 2, wherein the pressing is made by solder bonding.

5. The mounting method according to claim 1, wherein the temperature difference between the semiconductor chip and the substrate is in the range of 50°

K to 150°

K.