Method and apparatus for redundant location addressing using data compression
First Claim
1. A method for accessing a memory location, comprising:
- comparing a memory address of a memory access request to a first memory to decompressed defective memory addresses that are otherwise stored in a compressed format in a second memory, the defective memory addresses having substitute addresses associated and stored therewith;
where the memory address matches one of the decompressed defective memory addresses, extracting the substitute address associated therewith; and
accessing a memory location in a third memory corresponding to the extracted substitute address rather than a memory location in the first memory corresponding to the memory address.
5 Assignments
0 Petitions
Accused Products
Abstract
A method and apparatus for identifying defective cells in a memory array includes receiving a request for accessing an address and analyzing the address to determine when the address matches an address stored in a temporary memory array. When the address does not match any address stored in the temporary memory array, a wait instruction is sent to a processor and the address is analyzed to determine which portion of compressed data stored in a map memory array to decompress. The map memory array stores data containing compressed addresses of defective cells in a first memory array. The portion of compressed data is then decompressed to provide expanded data when the address does not match any address stored in the temporary memory array. The expanded data are then written to the temporary memory array, and the expanded data are compared to the address to determine when the address corresponds to an expanded datum of the expanded data.
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Citations
27 Claims
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1. A method for accessing a memory location, comprising:
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comparing a memory address of a memory access request to a first memory to decompressed defective memory addresses that are otherwise stored in a compressed format in a second memory, the defective memory addresses having substitute addresses associated and stored therewith;
where the memory address matches one of the decompressed defective memory addresses, extracting the substitute address associated therewith; and
accessing a memory location in a third memory corresponding to the extracted substitute address rather than a memory location in the first memory corresponding to the memory address. - View Dependent Claims (2, 3, 4)
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5. A method for accessing memory locations corresponding to memory addresses, the method comprising:
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comparing the received memory addresses for memory locations in a first memory to decompressed addresses of defective memory locations in the first memory device stored in a second memory, the decompressed addresses of the defective memory locations otherwise stored in a compressed format having associated therewith substitute addresses corresponding to substitute memory locations in a third memory; and
substituting for the memory addresses for memory locations in the first memory matching the decompressed addresses of defective memory locations the associated substitute memory addresses to access the substitute memory locations in the third memory. - View Dependent Claims (6, 7, 8)
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9. A method for accessing a requested memory location having a requested address, the method comprising:
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generating a first hash code from the requested address to a memory location in a first memory;
comparing the first hash code to hash codes for decompressed addresses stored in a temporary memory array;
when a match is found between a hash code for a decompressed address and the first hash code, determining if an address stored in the temporary memory array corresponds to the requested address; and
accessing a spare memory array when an address stored in the temporary array corresponds to the requested address. - View Dependent Claims (10, 11, 12, 13)
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14. A method for storing memory addresses of defective cells of a first memory array in a second memory array, the method comprising:
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receiving a memory test command;
initiating a memory test in response to the memory test command, the memory test for determining memory addresses of defective memory cells of the first memory array;
mapping memory addresses of defective memory cells to substitute addresses of substitute memory cells of a third memory array; and
compressing the memory addresses of defective memory cells and the substitute addresses associated therewith. - View Dependent Claims (15, 16, 17, 18)
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19. A method of remapping defective memory locations of a primary memory, the method comprising:
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identifying memory addresses of the defective memory locations in the primary memory;
mapping the identified memory addresses of the primary memory to substitute memory addresses that correspond to substitute memory locations in a spare memory, storing the identified memory addresses of the primary memory and the substitute memory addresses of the spare memory; and
in response to a request to access a defective memory location in the primary memory, substituting the associated substitute memory address in the spare memory for the memory address corresponding to the requested defective memory location in the primary memory. - View Dependent Claims (20, 21, 22, 23)
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24. A method for accessing memory locations, the method comprising steps of:
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determining whether a memory address of a memory location in a first memory matches an address of a defective memory cell, the addresses stored in a temporary memory array;
where a match is determined, accessing a substitute memory location in a third memory corresponding to a substitute memory address associated and stored with the matching address, the substitute memory location located in the third memory; and
otherwise, access the memory location in the memory array corresponding to the memory address. - View Dependent Claims (25, 26, 27)
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Specification