Self-aligned mask formed utilizing differential oxidation rates of materials

• US 6,844,225 B2
• Filed: 01/15/2003
• Issued: 01/18/2005
• Est. Priority Date: 01/15/2003
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Chen, Huajie, Stricker, Andreas D., Freeman, Gregory G., Schonenberg, Kathryn T., Rieh, Jae-Sung
• Primary Examiner(s): Ho, Hoai
• Assistant Examiner(s): Huynh, Andy
• Application Number:
  US10/345,469
• Publication Number:
  US 20040137670A1
• Time in Patent Office: 734 Days
• Field of Search: 438/165, 438/180, 438/229, 438/299, 438/320, 438/339, 438/364, 438/911
• US Class Current: 438/165
• CPC Class Codes: H01L 21/32105 Oxidation of silicon-containing layers
• CPC Class Codes: H01L 29/66242 Heterojunction transistors [HBT] with an active layer made of a group 13/15 material H01L29/66318
• CPC Class Codes: Y10S 438/911 Differential oxidation and etching

Abstract

A self-aligned oxide mask is formed utilizing differential oxidation rates of different materials. The self-aligned oxide mask is formed on a CVD grown base NPN base layer which compromises single crystal Si (or Si/SiGe) at active area and polycrystal Si (or Si/SiGe) on the field. The self-aligned mask is fabricated by taking advantage of the fact that poly Si (or Si/SiGe) oxidizes faster than single crystal Si (or Si/SiGe). An oxide film is formed over both the poly Si (or Si/siGe) and the single crystal Si (or Si/siGe) by using an thermal oxidation process to form a thick oxidation layer over the poly Si (or Si/siGe) and a thin oxidation layer over the single crystal Si (or Si/siGe), followed by a controlled oxide etch to remove the thin oxidation layer over the single crystal Si (or Si/siGe) while leaving the self-aligned oxide mask layer over the poly Si (or Si/siGe). A raised extrinsic base is then formed following the self-aligned mask formation. This self-aligned oxide mask blocks B diffusion from the raised extrinsic base to the corner of collector.

Claims

1. A method for forming a self-aligned oxide mask on a composite base of a bipolar transistor comprised of a collector, an emitter, and the composite base which includes a polycrystal Si on a field and a single crystal Si at an active area, wherein the method comprises:

forming an oxide layer over both the poly Si and the single crystal Si of the composite base by using a thermal oxidation process to form a thick oxide layer over the poly Si and a thin oxide layer over the single crystal Si;

performing a controlled oxide etch to remove the thin oxide layer over the single crystal Si while leaving a self-aligned oxide mask layer over the poly Si.

2. The method of claim 1, wherein differential oxidation is enhanced due to faster oxidation of doped Si compared to intrinsic Si of the bipolar transistor, and wherein the oxide layer thickness is formed so that in the single crystal Si, oxidation is limited to a top intrinsic Si cap of the base, and oxidation in the polycrystal Si consumes all the intrinsic Si cap and further oxidizes doped Si underneath the Si cap.

3. The method of claim 1, wherein the oxide layer is also initially formed thicker on a single crystal facet face of the single crystal Si than on a (100) face of the single crystal Si because of a higher oxidation rate of the single crystal facet face compared to the (100) face, such that after the controlled etch, an oxide mask layer also remains over the single crystal facet face.

4. The method of claim 3, wherein a side edge portion of isolation oxide of the transistor is pulled down during a pre-CVD HF etch provided for high quality CVD film growth, and the side edge portion is then filled with poly Si, and the self-aligned oxide mask blocks a diffusion path for B from the raised extrinsic base through the poly Si filled side edge corner to diffuse into the collector.

5. The method of claim 1, wherein a side edge portion of isolation oxide of the transistor is pulled down during a pre-CVD HF etch provided for high quality CVD film growth, and the side edge portion is then filled with poly Si, and the self-aligned oxide mask blocks a diffusion path for B from the raised extrinsic base through the poly Si filled side edge corner to diffuse into the collector.

6. A method for forming a self-aligned oxide mask on a composite base of a bipolar transistor comprised of a collector, an emitter, and the composite base includes a polycrystal Si/SiGe, which means a layer of polycrystal silicon on top of a layer of polycrystal silicon germanium on a field, and a single crystal Si/SiGe, which means a layer of single crystal silicon on top of a layer of single crystal silicon germanium, at an active area, wherein the method comprises:

forming an oxide layer over both the poly Si/SiGe and the single crystal Si/SiGe of the composite base by using a thermal oxidation process to form a thick oxide layer over the poly Si/SiGe and a thin oxide layer over the single crystal Si/SiGe;

performing a controlled oxide etch to remove the thin oxide layer over the single crystal Si/SiGe while leaving a self-aligned oxide mask layer over the poly Si/SiGe.

7. The method of claim 6, wherein differential oxidation is enhanced due to faster oxidation of SiGe compared to Si of the bipolar transistor.

8. The method of claim 6, wherein differential oxidation is enhanced due to faster oxidation of doped SiGe compared to intrinsic SiGe of the bipolar transistor, and wherein the oxide layer thickness is formed so that in the single crystal, oxidation is limited to a top intrinsic Si cap of the base, and oxidation in the polycrystal consumes all of the intrinsic Si cap and further oxidizes doped SiGe underneath the Si cap.

9. The method of claim 6, wherein the oxide layer is also initially formed thicker on a single crystal facet face of the single crystal layer than on a (100) face of the single crystal layer because of a higher oxidation rate of the single crystal facet face compared to the (100) face, such that after the controlled etch, an oxide mask layer also remains over the single crystal facet face.

10. The method of claim 9, wherein a side edge portion of isolation oxide of the transistor is pulled down during a pre-CVD HF etch provided for high quality CVD film growth, and the side edge portion is then filled with poly Si/SiGe, and the self-aligned oxide mask blocks a diffusion path for B from the raised extrinsic base through the poly Si/SiGe filled side edge corner to diffuse into the collector.

11. The method of claim 6, wherein a side edge portion of isolation oxide of the transistor is pulled down during a pre-CVD HF etch provided for high quality CVD film growth, and the side edge portion is then filled with poly Si/SiGe, and the self-aligned oxide mask blocks a diffusion path for B from the raised extrinsic base through the poly Si/SiGe filled side edge corner to diffuse into the collector.