Successive-approximation-register (SAR) analog-to-digital converter (ADC) and method utilizing N three-way elements
First Claim
1. A search algorithm for a successive-approximation-register (SAR) analog-to-digital converter (ADC), comprising:
- initializing each of N three-way elements of a digital-to-analog converter (DAC) for a SAR ADC to a middle reference voltage wherein the N three-way elements of the DAC are each able to be set to one of three values; and
determining and setting the each of the N three-way elements from the middle reference voltage to either a high reference voltage or a low reference voltage depending upon a comparison result between an analog input value of the SAR ADC and a DAC voltage value of the DAC.
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Abstract
A successive-approximation-register (SAR) analog-to-digital converter (ADC) and method utilizing N three-way elements are disclosed. The SAR ADC has a SAR logic system that implements an efficient search algorithm. The search algorithm involves initializing each of N three-way elements of a digital-to-analog converter (DAC) for the SAR ADC to a middle reference voltage. Each of the N three-way elements is able to be set to one of three values: a high reference voltage, a middle reference voltage, or a low reference voltage. The search algorithm determines and sets each of the N three-way elements from the middle reference voltage to either the high reference voltage or the low reference voltage depending upon a comparison result between an analog input value of the SAR ADC and a DAC voltage value.
32 Citations
17 Claims
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1. A search algorithm for a successive-approximation-register (SAR) analog-to-digital converter (ADC), comprising:
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initializing each of N three-way elements of a digital-to-analog converter (DAC) for a SAR ADC to a middle reference voltage wherein the N three-way elements of the DAC are each able to be set to one of three values; and
determining and setting the each of the N three-way elements from the middle reference voltage to either a high reference voltage or a low reference voltage depending upon a comparison result between an analog input value of the SAR ADC and a DAC voltage value of the DAC. - View Dependent Claims (2, 3, 4)
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5. A successive-approximation-register (SAR) analog-to-digital converter (ADC), comprising:
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a digital-to-analog converter (DAC) having N three-way elements wherein the DAC converts digital signals to analog signals and N is an integer greater than one;
a register coupled to the N three-way elements wherein each of the N three-way elements is able to be set to one of three values;
three way switches that three-way switch and couple each of the N three-way elements to either a high reference voltage, a middle reference voltage, or a low reference voltage;
a successive-approximation-register (SAR) logic system coupled to the register; and
a comparator for receiving and comparing an analog input value and a DAC output value from the DAC and for providing a comparator output signal that is fed into the SAR logic system. - View Dependent Claims (6, 7, 8, 9)
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10. A successive-approximation-register (SAR) algorithm for a SAR logic system of a SAR analog-to-digital converter (ADC), comprising:
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a. a memory medium; and
b. a successive-approximation-register (SAR) algorithm stored on said memory medium, said SAR algorithm comprising instructions for;
i. initializing each of N three-way elements of a digital-to-analog converter (DAC) for the SAR ADC to a middle reference voltage wherein the N three-way elements of the DAC are each able to be set to one of three values; and
ii. determining and setting the each of the N three-way elements from the middle reference voltage to either a high reference voltage or a low reference voltage depending upon a comparison result between an analog input value of the SAR ADC and a DAC voltage value of the DAC. - View Dependent Claims (11, 12, 13)
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14. A three-way element for a digital device, comprising:
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an element having at least three states and wherein the at least three states include at least a low state, a middle state, and a high state; and
wherein the three-way element having the at least three states is utilized in conjunction with a three-way switch that three-way switches and sets the three-way element to one of the at least three states. - View Dependent Claims (15, 16, 17)
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Specification