Semiconductor device

• US 6,847,066 B2
• Filed: 08/08/2001
• Issued: 01/25/2005
• Est. Priority Date: 08/11/2000
• Status: Expired due to Term

• Current Assignee: Casio Computer Company Limited, Oume Electronics Co. Ltd
• Original Assignee: Casio Computer Company Limited, OKI Electric Industry Company Limited
• Inventors: Tahara, Iwao, Mihara, Ichiro, Aoki, Yutaka
• Primary Examiner(s): Fourson, George
• Assistant Examiner(s): Toledo, Fernando L.
• Application Number:
  US09/924,293
• Publication Number:
  US 20020017730A1
• Time in Patent Office: 1,266 Days
• Field of Search: 257/306, 257/243, 257/308, 438/30, 438/149, 438/256, 438/384, 438/386
• US Class Current: 257/243
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/5223 Capacitor integral with wiring layers
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 27/0805 Capacitors only
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/1423 Monolithic Microwave Integrated Circuit [MMIC]
• CPC Class Codes: H01L 2924/19041 being a capacitor

Abstract

A thin film passive element includes at least one of a capacitance element having a plurality of conductive layers and a dielectric material layer and an inductance element formed of a patterned conductive layer is stacked on a circuit element-forming region of a semiconductor substrate provided with a plurality of connection pads and is connected to the circuit element of the circuit element-forming region.

Claims

1. A semiconductor device comprising:

a semiconductor substrate including a circuit element-forming region in which an integrated circuit is formed, and a plurality of connection pads;

an organic insulating film formed on said circuit element-forming region;

a plurality of columnar electrodes which each have an upper edge surface outwardly exposed for connection to an external device, including at least one columnar electrode formed over the circuit element-forming region;

a plurality of conductive layers formed on the organic insulating film and electrically connecting at least the connection pads and the at least one columnar electrode arranged over the circuit element-forming region;

at least one thin film passive element including a conductive layer formed on said insulating film, wherein the conductive layer of the thin film passive element and the plurality of conductive layers are laterally arranged and formed by a same layer of the semiconductor device; and

a sealing film which is provided between the columnar electrodes, and which covers the thin film passive element and the semiconductor substrate except for the upper edge surface of each of the columnar electrodes.

2. The semiconductor device according to claim 1, wherein said thin film passive element comprises at least one capacitance element.

3. The semiconductor device according to claim 2, wherein:

said capacitance element includes two conductive layers and a dielectric material layer,

said two conductive layers are stacked one upon the other on said insulating film, and

said dielectric material layer is interposed between the conductive layers.

4. The semiconductor device according to claim 2, wherein:

said at least one conductive layer of said capacitance element includes at least two portions having opposing end surfaces and formed in one layer on said insulating film, and

a dielectric material layer is formed in a clearance between the opposing end surfaces of the at least two portions.

5. The semiconductor device according to claim 2, wherein:

said at least one conductive layer of said capacitance element includes at least two portions having opposing end surfaces and formed in one layer on said insulating film,

said columnar electrodes are formed as plate-like electrodes respectively positioned on the at least two portions, and

a dielectric material layer is formed at least in a clearance between the opposing end surfaces of the plate-like electrodes.

6. The semiconductor device according to claim 1, wherein said thin film passive element comprises at least one inductance element.

7. The semiconductor device according to claim 6, wherein:

said inductance element includes one conductive layer having one of an angular eddy shape, a rectangular wave shape, and a loop shape,

said connection pads include at least one first connection pad that is not electrically connected to any of said columnar electrodes, and at least one second connection pad electrically connected to at least one of said columnar electrodes, and

said inductance element includes at least two terminals, at least one of which is connected to at least one of said first connection pad and said second connection pad.

8. The semiconductor device according to claim 7, wherein said inductance element further comprises a magnetic film formed on said one conductive layer.

9. The semiconductor device according to claim 1, wherein said thin film passive element includes at least two terminals, at least one of which is electrically connected to one of said columnar electrodes.

10. The semiconductor device according to claim 1, wherein said thin film passive element includes at least two terminals, at least one of which is electrically connected to one of said connection pads.

11. The semiconductor device according to claim 1, wherein said thin film passive element includes at least two terminals, each of which is electrically connected to at least one of said connection pads and said columnar electrodes.

12. The semiconductor device according to claim 1, wherein said at least one thin film passive element comprises a plurality of thin film passive elements.

13. A method of manufacturing a semiconductor device comprising:

preparing a semiconductor wafer substrate including a plurality of chip forming regions each having a circuit element-forming region in which an integrated circuit is formed, and a plurality of connection pads;

forming an organic insulating film on the circuit element-forming region of each of said chip forming regions;

forming a plurality of conductive layers connected to the connection cads;

forming a plurality of columnar electrodes which are provided for connection to an external device, and which are each electrically connected to at least one of said plurality of connection pads through said plurality of conductive layers. wherein at least one of said plurality of columnar electrodes is formed on said circuit element-forming region;

forming a plurality of thin film passive elements each including a conductive layer on said organic insulating film, wherein the conductive layer of the thin film passive element and the plurality of conductive layers are laterally arranged and formed by a same layer of the semiconductor device;

forming a sealing film on an exposed entire upper surface of the semiconductor wafer substrate between the columnar electrodes and covering the thin film passive elements and the columnar electrodes;

exposing only an upper edge surface of each of the columnar electrodes from the sealing film; and

dividing said semiconductor wafer substrate into individual chip forming regions so as to form a plurality of semiconductor devices each having at least one of said thin film passive elements.

14. The method of manufacturing a semiconductor device according to claim 13, wherein said forming of said thin film passive elements comprises forming at least one capacitance element.

15. The method of manufacturing a semiconductor device according to claim 14, wherein said forming of each said capacitance element comprises:

forming a first conductive layer on the circuit element-forming region of said semiconductor substrate;

forming a dielectric material layer on said first conductive layer; and

forming a second conductive layer on said dielectric material layer.

16. The method of manufacturing a semiconductor device according to claim 14, wherein said forming of each said capacitance element comprises:

forming on said insulating film one conductive layer having at least two portions having opposing end surfaces; and

forming a dielectric material layer in a clearance between the opposing end surfaces of the at least two portions.

17. The method of manufacturing a semiconductor device according to claim 14, wherein said forming of each said capacitance element comprises:

forming on said insulating film one conductive layer having at least two portions having opposing end surfaces;

forming said columnar electrodes as plate-like electrodes which are opposed to each other respectively on the at least two portions; and

forming a dielectric material layer in a clearance between said opposed plate-like electrodes.

18. The method of manufacturing a semiconductor device according to claim 13, wherein said forming of said thin film passive elements comprises forming at least one inductance element.

19. The method of manufacturing a semiconductor device according to claim 18, wherein said forming of each said inductance element comprises:

patterning one conductive layer in any one of an angular eddy shape, a rectangular wave shape and a loop shape;

forming said connection pads to include at least one first connection pad that is not electrically connected to any of said columnar electrodes, and at least one second connection pad electrically connected to at least one of said columnar electrodes, and

forming at least two terminals, at least one of which is connected to at least one of said first connection pad and said second connection pad.

20. The method of manufacturing a semiconductor device according to claim 19, wherein said forming of the inductance element further comprises forming a magnetic film on said one conductive layer.

21. The method of manufacturing a semiconductor device according to claim 13, wherein said forming of said thin film passive elements comprises forming at least two terminals, at least one of which is electrically connected to one of said columnar electrodes.

22. The method of manufacturing a semiconductor device according to claim 13, wherein said forming of said thin film passive elements comprises forming at least two terminals, at least one of which is electrically connected to one of said connection pads.

23. The method of manufacturing a semiconductor device according to claim 13, wherein said forming of said thin film passive elements comprises forming at least two terminals, each of which is electrically connected to at least one of said connection pads and said columnar electrodes.