Semiconductor device having a stacked gate insulation film and a gate electrode and manufacturing method thereof

• US 6,847,079 B2
• Filed: 03/08/2000
• Issued: 01/25/2005
• Est. Priority Date: 09/13/1999
• Status: Expired due to Term

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Nakamura, Katsumi
• Primary Examiner(s): Nadav, Ori
• Application Number:
  US09/521,460
• Publication Number:
  US 20020121661A1
• Time in Patent Office: 1,784 Days
• Field of Search: 257328-342
• US Class Current: 257/330
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/0217 the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz H01L21/02126 and H01L21/0214 take precedence
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/02233 of the semiconductor substrate or a semiconductor layer
• CPC Class Codes: H01L 21/02255 formation by thermal treatment H01L21/02252 takes precedence; after treatment of an insulating film H01L21/3105 and subgroups
• CPC Class Codes: H01L 21/02271 deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition H01L21/02266 takes precedence
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/28211 in a gaseous ambient using an oxygen or a water vapour, e.g. RTO, possibly through a layer H01L21/28194 and H01L21/28202 take precedence
• CPC Class Codes: H01L 21/3144 on silicon
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
• CPC Class Codes: H01L 29/66348 with a recessed gate
• CPC Class Codes: H01L 29/7397 and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT

Abstract

A semiconductor device of the present invention includes an MOSFET which has a stacked gate insulation film formed of at least two types of insulation films, that is, a thermal oxide film provided on a semiconductor substrate and a CVD oxide film provided nearer to a gate electrode than thermal oxide film. The stacked insulation film is provided so that the ratio of the thickness of the CVD oxide film to that of the entire stacked gate insulation film is at least 20%. By such a structure, the gate insulation film thickness is kept uniform. Further, nitrogen may be segregated at an interface between the thermal oxide film and a semiconductor substrate and an interface between the gate electrode and the CVD oxide film. Thus, the occurrence of interface states is prevented between the gate insulation film and the semiconductor substrate as well as between the gate insulation film and the gate electrode. As a result, a semiconductor device with improved gate insulation film and transistor characteristics of an MOSFET as well as a manufacturing method thereof are obtained.

Claims

1. A field effect type semiconductor device having a stacked gate insulation film and a gate electrode on a surface of a semiconductor layer,

said stacked gate insulation film including

a thermal oxide film formed on the surface of said semiconductor layer, and

a CVD oxide film formed on and contacting said thermal oxide film, and

said stacked gate insulation film having nitrogen segregated at an interface region between at least one of said thermal oxide film and said semiconductor layer, and said gate electrode and said CVD oxide film, wherein

a concentration of nitrogen along an entire length of the stacked gate insulation film, excluding the vicinity of both interface regions, is higher than the average concentration of nitrogen in the semiconductor layer or the gate electrode.

2. The semiconductor device according to claim 1, wherein a ratio of the thickness of said CVD oxide film to that of said entire stacked gate insulation film is at least 20%.

3. The semiconductor device according to claim 1, wherein a ratio of thickness of said CVD oxide film to that of an entire stacked gate insulation film is at least 50%.

4. The semiconductor device according to claim 1, wherein said stacked gate insulation film is used as a gate insulation film of a power transistor.

5. The semiconductor device according to claim 1, wherein

said semiconductor layer has a trench provided in the semiconductor substrate, and

said stacked gate insulation film is formed along a surface of said trench.

6. The semiconductor device according to claim 5, wherein

said gate electrode is filled in a recess remaining after formation of said stacked gate insulation film, and

said gate electrode has its upper surface located above a main surface of said semiconductor substrate.

7. The semiconductor device according to claim 5, wherein

said gate electrode is filled in a recess remaining after formation of said stacked gate insulation film, and

said gate electrode has its upper surface located at or below a main surface of said semiconductor substrate.

8. The semiconductor device according to claim 1, wherein

said stacked gate insulation film further includes a silicon nitride film formed over said CVD oxide film.

9. A field effect type semiconductor device having a stacked gate insulation film and a gate electrode on a surface of a semiconductor layer,

said stacked gate insulation film including

a thermal oxide film formed on the surface of said semiconductor layer,

a silicon nitride film, and

a CVD oxide film formed on said thermal oxide film, and

said stacked gate insulation film having nitrogen segregated at an interface region between at least one of said thermal oxide film and said semiconductor layer, and said gate electrode and said CVD oxide film, and wherein

said stacked gate insulation film further includes an oxide film which is formed by oxidizing a surface of said silicon nitride film, and

a concentration of nitrogen along an entire length of the stacked gate insulation film, excluding the vicinity of both interface regions, is higher than the average concentration of nitrogen in the semiconductor layer or the gate electrode.

10. The semiconductor device according to claim 9, wherein

said stacked gate insulation film further includes another CVD oxide film on the oxide film.

11. A field effect type semiconductor device having a stacked gate insulation film and a gate electrode on a surface of a semiconductor layer,

said stacked gate insulation film including

a thermal oxide film formed on the surface of said semiconductor layer, and

a CVD oxide film formed on and contacting said thermal oxide film, wherein

said stacked gate insulation film has nitrogen segregated at least in one of a vicinity of an interface between said thermal oxide film and said semiconductor layer within said thermal oxide film, and a vicinity of an interface between said gate electrode and said CVD oxide film within said CVD oxide film, and

a concentration of nitrogen along an entire length of the stacked gate insulation film, excluding the vicinity of both interface regions, is higher than the average concentration of nitrogen in the semiconductor layer or the gate electrode.

12. A field effect type semiconductor device having a gate insulation film and a gate electrode on a surface of a semiconductor layer,

said gate insulation film including

a thermal oxide film formed on said semiconductor layer, and

a CVD oxide film formed on or above said thermal oxide film, and wherein

said gate insulation film has nitrogen segregated at least in one of a vicinity of an interface between said thermal oxide film and said semiconductor layer within said thermal oxide film, and an interface between said semiconductor layer and said thermal oxide film and an interface between said gate electrode and said CVD oxide film within said CVD oxide film,

a concentration of nitrogen throughout said gate insulation film is higher than a concentration of nitrogen in said semiconductor layer and in said gate electrode, and

the concentration of nitrogen along an entire length of the gate insulation film, excluding the vicinity of both interface region is higher than the average concentration of nitrogen in the semiconductor layer or the gate electrode.

13. The semiconductor device according to claim 12, wherein a concentration of nitrogen of an interface between said semiconductor layer and said gate insulation film is higher than that of an interface between said gate electrode and said gate insulation film.

14. The semiconductor device according to claim 12, wherein said field effect type semiconductor device is a MOS (Metal Oxide Silicon) transistor.

15. The semiconductor device according to claim 12, wherein said field effect type semiconductor device has a trench gate structure.

16. The semiconductor device according to claim 12, wherein said gate insulation film is a stacked gate insulation film.

17. The semiconductor device according to claim 13, wherein said gate insulation film is a stacked gate insulation film.