Bumping technology in stacked die configurations
First Claim
Patent Images
1. A stacked semiconductor assembly, comprising:
- a first semiconductor die including an active surface and a backside, said active surface including a plurality of bond pads and at least one redistribution bond pad circuit thereon, said plurality of bond pads electrically connected to integrated circuitry of said first semiconductor die, said at least one redistribution bond pad circuit electrically isolated from said integrated circuitry of said first semiconductor die and including a plurality of redistribution bond pads;
a second semiconductor die including an active surface, a backside, and a plurality of bond pads on said active surface thereof, said active surface of said second semiconductor die facing said active surface of said first semiconductor die; and
at least one electrical connector extending between at least one bond pad of said plurality of bond pads on said active surface of said second semiconductor die and at least one redistribution bond pad of said plurality of redistribution bond pads on said first semiconductor die.
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Abstract
A stacked semiconductor package including a plurality of stacked semiconductor devices on a substrate, and a method of forming the same. The semiconductor devices are stacked in an active surface-to-backside configuration. The top semiconductor die is flipped over to face the active surface of the semiconductor die directly below. An electrical connector can extend from a bond pad on the top semiconductor die to a redistribution circuit on the semiconductor die below. The redistribution circuit can be electrically connected to a substrate. Alternatively, an electrical connector extends from a bond pad on top semiconductor die to a bond pad on a substrate.
185 Citations
57 Claims
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1. A stacked semiconductor assembly, comprising:
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a first semiconductor die including an active surface and a backside, said active surface including a plurality of bond pads and at least one redistribution bond pad circuit thereon, said plurality of bond pads electrically connected to integrated circuitry of said first semiconductor die, said at least one redistribution bond pad circuit electrically isolated from said integrated circuitry of said first semiconductor die and including a plurality of redistribution bond pads;
a second semiconductor die including an active surface, a backside, and a plurality of bond pads on said active surface thereof, said active surface of said second semiconductor die facing said active surface of said first semiconductor die; and
at least one electrical connector extending between at least one bond pad of said plurality of bond pads on said active surface of said second semiconductor die and at least one redistribution bond pad of said plurality of redistribution bond pads on said first semiconductor die. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A semiconductor assembly, comprising:
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a substrate;
a first semiconductor die including an active surface, a second surface, and a plurality of peripheral edges, said second surface disposed on said substrate, said active surface having a plurality of bond pads thereon;
a second semiconductor die including an active surface, a second surface, a plurality of peripheral edges and a plurality of bond pads on said active surface, said active surface of said second semiconductor die facing said active surface of said first semiconductor die, at least one bond pad of said plurality of bond pads of said first semiconductor die communicating with a corresponding redistribution circuit of said second semiconductor die, said redistribution circuit being electrically isolated from integrated circuitry of said second semiconductor die, at least one edge of said plurality of peripheral edges of said second semiconductor die extending laterally beyond at least one corresponding peripheral edge of said plurality of peripheral edges of said first semiconductor die; and
at least one connective element extending from at least one bond pad of said plurality of bond pads on said active surface of said second semiconductor die to a corresponding contact area of said substrate adjacent to said at least one corresponding peripheral edge of said first semiconductor die. - View Dependent Claims (23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35)
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36. A semiconductor device for use in a stacked semiconductor assembly, said semiconductor device comprising:
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a backside;
an active surface including a plurality of bond pads; and
at least one redistribution bond pad circuit on said active surface, said at least one redistribution bond pad circuit electrically isolated from integrated circuitry of said semiconductor device. - View Dependent Claims (37, 38, 39, 40, 41, 42, 43, 44, 45, 46)
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47. A semiconductor assembly, comprising:
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a substrate;
a first semiconductor die including an active surface, a second surface, and a plurality of peripheral edges, said second surface disposed on said substrate, said active surface having a plurality of bond pads thereon;
a second semiconductor die including an active surface, a second surface, a plurality of peripheral edges and a plurality of bond pads on said active surface, said active surface of said second semiconductor die facing said active surface of said first semiconductor die, at least one edge of said plurality of peripheral edges of said second semiconductor die extending laterally beyond at least one corresponding peripheral edge of said plurality of peripheral edges of said first semiconductor die;
a third semiconductor die disposed directly below said second semiconductor die, said third semiconductor die including an active surface and a backside, said active surface including a plurality of bond pads and at least one redistribution bond pad circuit thereon, said plurality of bond pads of said third semiconductor die electrically connected to integrated circuitry of said third semiconductor die, said at least one redistribution bond pad circuit independent from the integrated circuitry of said third semiconductor die and including a plurality of redistribution bond pads; and
at least one connective element extending from at least one bond pad of said plurality of bond pads on said active surface of said second semiconductor die to a corresponding contact area of said substrate adjacent to said at least one corresponding peripheral edge of said first semiconductor die. - View Dependent Claims (48, 49, 50, 51, 52, 53, 54, 55, 56, 57)
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Specification