Enhancement of current-carrying capacity of a multilayer circuit board

• US 6,848,178 B2
• Filed: 05/14/2003
• Issued: 02/01/2005
• Est. Priority Date: 05/30/2002
• Status: Active Grant

• Current Assignee: Murata Manufacturing Co Limited
• Original Assignee: DENSO Corporation
• Inventors: Masuda, Gentaro, Kondo, Koji, Kataoka, Ryohei
• Primary Examiner(s): Cuneo, Kamand
• Assistant Examiner(s): Bui, Hung S.
• Application Number:
  US10/437,041
• Publication Number:
  US 20030222340A1
• Time in Patent Office: 629 Days
• Field of Search: 361/795, 361/792, 361/748, 361/760, 174/266, 174/262, 174/263, 298/52, 257/678, 257/700, 257/108, 257/610, 438/108, 438/610
• US Class Current: 29/852
• CPC Class Codes: H01L 23/498 Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers shape of the substrate H01L23/13
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/49838 Geometry or layout
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H05K 2201/0129 Thermoplastic polymer, e.g. auto-adhesive layer; Shaping of thermoplastic polymer
• CPC Class Codes: H05K 2201/0394 Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
• CPC Class Codes: H05K 2201/09881 Coating only between conductors, i.e. flush with the conductors
• CPC Class Codes: H05K 3/4069 for via connections in organic insulating substrates
• CPC Class Codes: H05K 3/4617 characterized by laminating only or mainly similar single-sided circuit boards
• CPC Class Codes: H05K 3/4632 laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

A multilayer circuit board, in which a plurality of insulating layers and a plurality of conductive layers, each of which includes a conductive pattern, have been laminated, includes an insulating layer, a conductive compound, and a conductive pattern. The insulating layer has a trench. The conductive compound is located in the trench. The conductive pattern adjoins the trench and is electrically connected to the conductive compound. The conductive pattern and the conductive compound make up a conductive wire that has a higher current-carrying capacity than the conductive pattern.

Claims

1. A method for manufacturing a multilayer circuit board, in which a plurality of insulating layers and a plurality of conductive layers, each of which includes conductive patterns, are laminated, the method comprising:

preparing a conductive pattern film, the preparing including;

forming a conductive pattern on an insulating layer, the conductive pattern continuously extending along a surface of the insulating layer for at least a predetermined length on a surface of the insulating layer;

forming a trench in the insulating layer which is adjacent to the conductive pattern, the trench continuously extending along the conductive pattern for the predetermined length; and

packing a low resistivity conductive paste, which includes metal particles, in the trench;

stacking the conductive pattern film and an insulating layer to form a stacked body; and

heat pressing the stacked body such that the insulating layers bond together, the conductive paste is sintered to form a conductive compound, which is electrically connected to the conductive pattern, and the conductive compound in the trench and the conductive pattern form a conductive wire that has a higher current-carrying capacity with respect to a direction parallel to the surface of the insulating layer than that of the conductive pattern only.

2. The method according to claim 1, wherein the trench is formed to extend through the insulating layer and be bottomed by the conductive pattern.

3. The method according to claim 2, wherein the trench is formed to have a width narrower than that of the conductor pattern.

4. The method according to claim 1, wherein the insulating layer is formed to have a thickness of 10 to 200 μ

m and wherein the conductor pattern is formed to have a thickness of 5 to 75 μ

m.

5. The method according to claim 1, wherein said conductive pattern is designated as a first conductive pattern, and the steps further comprises:

forming a second conductive pattern on an insulating film, the second conductive pattern being formed in parallel with the first conductive film, wherein

the trench is formed in the insulating layer which is placed between the first and second conductive patterns when the insulating layers are stacked.

6. A method for manufacturing a multi-layer circuit board, the method comprising:

preparing a plurality of insulating films made of thermoplastic resin, which are prepared to be stacked in a predetermined order;

forming conductive patterns on the insulating films, the conductive patterns including first conductive patterns and a second conductive pattern;

forming a plurality of via holes and a trench in the insulating layers, the via holes being formed on locations on which at least one of the first conductive patterns exist, and the trench being formed on a location on which the second conductive pattern exists;

filling a low resistive conductive paste in the via holes and the trench;

stacking the insulating films after the preceding steps are completed;

heat pressing the stacked body such that the insulating layers bond together, the conductive paste is sintered to form a conductive compound, which is electrically connected to the first and second conductive patterns, wherein

the conductive compound in the via holes provide perpendicular current paths with respect to a surface of the insulating films, and

the conductive compound in the trench cooperates with the second conductive pattern to provide a parallel current path with respect to the surface of the insulating films, the parallel current path having a higher current-carrying capacity than that of the first conductive pattern only.

7. The method for manufacturing a multi-layer circuit board according to claim 6, wherein

the conductive patterns forming step further forms a third conductive pattern on one of the insulating layer, the third conductive pattern being placed in parallel with the second conductive pattern when the insulating films are stacked;

and

the trench forming step penetrates the insulating film placed between the second and third conductive films, and the conductive compound in the trench cooperates with both the second and third conductive pattern to provide the parallel current path.

8. The method for manufacturing a multi-layer circuit board according to claim 7, wherein

the second and third conductive patterns extend for a predetermined length with a predetermined width;

and

the trench has a width narrower than that of the second and third conductor patterns.

9. The method for manufacturing a multi-layer circuit board according to claim 8, wherein the via holes are apparently smaller than the trench.

10. The method for manufacturing a multi-layer circuit board according to claim 6, wherein

the second conductive pattern extends for a predetermined length with a predetermined width;

and

the trench has a width narrower than that of the second conductor pattern.

11. The method for manufacturing a multi-layer circuit board according to claim 10, wherein the via holes are apparently smaller than the trench.