Group-III nitride based high electron mobility transistor (HEMT) with barrier/spacer layer

• US 6,849,882 B2
• Filed: 03/19/2002
• Issued: 02/01/2005
• Est. Priority Date: 05/11/2001
• Status: Expired due to Term

• Current Assignee: MACOM Technology Solutions Holdings, Inc., Regents of the University of California (University of California)
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Smorchkova, Ioulia P., Chavarkar, Prashant, Wu, Yifeng, Mishra, Umesh, Keller, Stacia, Walukiewicz, Wladyslaw
• Primary Examiner(s): Jackson, Jerome
• Assistant Examiner(s): NGUYEN, JOSEPH H
• Application Number:
  US10/102,272
• Publication Number:
  US 20020167023A1
• Time in Patent Office: 1,050 Days
• Field of Search: 257/191, 257/192, 257/194, 257/200
• US Class Current: 257/191
• CPC Class Codes: H01L 29/2003 Nitride compounds
• CPC Class Codes: H01L 29/7783 using III-V semiconductor material

Abstract

A Group III nitride based high electron mobility transistors (HEMT) is disclosed that provides improved high frequency performance. One embodiment of the HEMT comprises a GaN buffer layer, with an Al_yGa_1−yN (y=1 or y 1) layer on the GaN buffer layer. An Al_xGa_1−xN (0≦x≦0.5) barrier layer on to the Al_yGa_1−yN layer, opposite the GaN buffer layer, Al_yGa_1−yN layer having a higher Al concentration than that of the Al_xGa_1−xN barrier layer. A preferred Al_yGa_1−yN layer has y=1 or y˜1 and a preferred Al_xGa_1−xN barrier layer has 0≦x≦0.5. A 2DEG forms at the interface between the GaN buffer layer and the Al_yGa_1−yN layer. Respective source, drain and gate contacts are formed on the Al_xGa_1−xN barrier layer. The HEMT can also comprising a substrate adjacent to the buffer layer, opposite the Al_yGa_1−yN layer and a nucleation layer between the Al_xGa_1−xN buffer layer and the substrate.

Claims

1. A high electron mobility transistor (HEMT), comprising:

a GaN buffer layer;

an Al_yGa<sub>1−

y</sub>N (y>

0.5) layer on said GaN buffer layer;

an Al_xGa<sub>1−

x</sub>N barrier layer on said Al_yGa<sub>1−

y</sub>N layer opposite said GaN buffer layer, said Al_yGa<sub>1−

y</sub>N layer having a higher Al content than said Al_xGa<sub>1−

x</sub>N barrier layer; and

a 2DEG at the interface between said GaN buffer layer and said Al_yGa<sub>1−

y</sub>N layer.

2. The HEMT of claim 1, wherein said Al_yGa₁₋

yN layer comprises Al_yGa<sub>1−

y</sub>N (y=1 or y≈

1).

3. The HEMT of claim 1, wherein said Al_xGa₁₋

xN barrier layer comprises AL_xGa<sub>1−

x</sub>N (0≦

x≦

0.5).

4. The HEMT of claim 1, further comprising respective source, drain and gate contacts on said Al_xGa₁₋

xN barrier layer.

5. The HEMT of claim 1, further comprising a substrate adjacent to said buffer layer, opposite said Al_yGa₁₋

yN layer, said substrate made from a material from the group consisting of sapphire, silicon carbide, gallium nitride and silicon.

6. The HEMT of claim 1, further comprising a nucleation layer between said GaN buffer layer and said substrate.

7. The HEMT of claim 4, wherein said source and drain contacts are made of an alloy from the group consisting of titanium, aluminum, and nickel.

8. The HEMT of claim 4, wherein said gate made of a material from the group consisting of titanium, platinum, chromium, alloys of titanium and tungsten, and platinum silicide.

9. The HEMT of claim 1, wherein said GaN buffer layer is less than approximately 5 μ

m thick.

10. The HEMT of claim 1, wherein said Al_yGa₁₋

yN layer is less than approximately 50 Å

thick.

11. The HEMT of claim 1, wherein said Al_xGa₁₋

xN barrier layer is approximately 100 to 1000 Å

thick.

12. The HEMT of claim 4, wherein the resistance under said gate contact is greater than the resistance under said source and drain contacts.

13. The HEMT of claim 4, wherein said barrier layer is thinner under said gate contact.

14. The HEMT of claim 1, wherein said layers can be fabricated digitally.

15. A group III nitride based high electron mobility transistor (HEMT), comprising:

a semiconductor buffer layer;

a high polarization semiconductor layer on said buffer layer;

a semiconductor barrier layer on said high polarization layer so that said high polarization layer is sandwiched between said buffer and barrier layers, each of said layers having a non-zero total polarization pointing in the same direction, the magnitude of said polarization in said high polarization layer higher than the polarization of said buffer and barrier layers; and

a two dimensional electron gas at the interface between said buffer layer and said high polarization layer.

16. The HEMT of claim 15, further comprising respective source, drain and gate contacts that contact said barrier layer.

17. The HEMT of claim 15, further comprising a substrate adjacent to said buffer layer, opposite said high polarization layer, said substrate made from a material from the group consisting of sapphire, silicon carbide, gallium nitride and silicon.

18. The HEMT of claim 15, further comprising a nucleation layer between said buffer layer and said substrate.

19. The HEMT of claim 15, wherein said buffer layer is made of GaN.

20. The HEMT of claim 15, wherein said buffer layer is less than 5 μ

m thick.

21. The HEMT of claim 15, wherein said high polarization semiconductor layer is made of Al_yGa₁₋

yN (y=1 or y≈

1).

22. The HEMT of claim 15, wherein said high polarization layer is less than 50 Å

thick.

23. The HEMT of claim 15, wherein said barrier layer made of Al_xGa₁₋

xN (0≦

x≦

0.5).

24. The HEMT of claim 15, wherein said barrier layer is 100 to 1000 Å

thick.

25. A high electron mobility transistor (HEMT), comprising:

a bottom layer of Group III nitride semiconductor material;

a middle layer of Group III nitride semiconductor material on said bottom layer, wherein said middle layer can comprise one or more Group III elements one of which is Al;

a top layer of Group III nitride semiconductor material on said middle layer, opposite said bottom layer, wherein said top layer can comprise one or more Group III elements, said middle layer having Al concentration that is higher than 50% and said Al in said middle layer also having a concentration that is higher than the concentration of any Al in said top layer; and

a 2DEG at the interface between said middle and bottom layer.

26. The HEMT of claim 25, further comprising respective source, drain and gate contacts that contact said top layer.

27. The HEMT of claim 25, further comprising a substrate adjacent to said bottom layer, opposite said top layer.

28. The HEMT of claim 25, further comprising a nucleation layer between said bottom layer and said substrate.

29. The HEMT of claim 25, wherein said bottom layer is made of GaN and is less than 5 μ

m thick.

30. The HEMT of claim 25, wherein said middle layer is made of Al_yGa₁₋

yN (y=1 or y≈

1) and is less than 50 Å

thick.

31. The HEMT of claim 25, wherein said barrier layer made of Al_xGa₁₋

xN (0≦

x≦

0.5) and is 100 to 1000 Å

thick.

32. The HEMT of claim 26, wherein the resistance under said gate contact is greater than the resistance under said source and drain contacts.

33. The HEMT of claim 26, wherein said barrier layer is thinner under said gate contact.

34. The HEMT of claim 25, wherein said layers can be fabricated digitally.