Programmable dual mode hysteretic power output controller

• US 6,853,173 B2
• Filed: 09/17/2002
• Issued: 02/08/2005
• Est. Priority Date: 01/25/2002
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Caine, Steven Lance, Wier, Charles Garrison, Dunn, William Alva
• Primary Examiner(s): Patel, Rajnikant B.
• Application Number:
  US10/244,407
• Publication Number:
  US 20030141858A1
• Time in Patent Office: 875 Days
• Field of Search: 323/282, 323/283, 323/284, 323/286, 323/288, 323/285, 323/222, 323/234, 363/16, 363/34, 363/37, 363/39, 363/87, 363/86, 363/89, 363/44, 363/84
• US Class Current: 323/285
• CPC Class Codes: H02M 1/0019 the disturbance parameters being load current fluctuations
• CPC Class Codes: H02M 1/0032 Control circuits allowing low power mode operation, e.g. in standby mode
• CPC Class Codes: H02M 3/157 with digital control
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A power output controller includes an output stage, a sensing circuit that compares an output voltage of the output stage with a reference voltage, and a digital controller that controls output pulses that charge the output stage with a frequency that is dependent on an output of the sensing circuit.

Claims

1. A power output controller comprising:

an output stage;

a sensing circuit for providing an output representative of an output voltage of the output stage; and

a digital controller that controls output pulses that charge the output stage with a frequency that is dependent on the output of the sensing circuit,

wherein the digital controller includes a logic circuit having N states S₁ through S_N corresponding to N pulse frequencies f_i (i=1 through N) and that controls output to the output stage, the pulse frequencies f_i monotonically increasing.

2. The power output controller of claim 1, wherein the output stage includes a capacitor being charged by the output pulses.

3. The power output controller of claim 1, wherein the sensing circuit scales the output voltage prior to inputting the output voltage into a comparator.

4. The power output controller of claim 1, wherein the sensing circuit includes an op amp for scaling the output voltage prior to inputting the output voltage into a comparator.

5. The power output controller of claim 1, further including a pulse generator for generating the output pulses, the pulse generator being controlled by the digital controller.

6. The power output controller of claim 1, wherein the N states include M states S₁ through S_M with lower frequencies f₁ through f_M and states S_M+1 through S_N with higher frequencies f_M+1 through f_N,

wherein the logic circuit switches to state S_N from any of states S₁ through S_M when a number of pulses needed to charge the output stage exceeds a threshold number N_Ai for each state S₁ through S_N,

wherein the logic circuit switches to a next higher state from any of states S_M+1 through S_N−

1 when the number of pulses needed to charge the output stage exceeds N_Ai for each corresponding state S_M+1 through S<sub>N−

1</sub>, and

wherein the logic circuit switches to a next lower state when the number of pulses needed to charge the output stage is less than a threshold number N_Bi for each state S₂ through S_N.

7. The power controller of claim 6, wherein N_Ai>

N_Bi for each state.

8. The power controller of claim 1, wherein the frequencies f_i are programmable.

9. A power controller comprising:

an output stage;

a sensing circuit for providing an output corresponding to a voltage of the output stage;

a pulse generator that charges the output stage; and

a multi-state digital logic circuit having N states S₁ through S_N corresponding to N pulse frequencies f_i (i=1 through N) and that controls the pulse generator, the pulse frequencies f_i monotonically increasing,

wherein the N states include states S₁ through S_M with lower frequencies f₁ through f_M and states S_M+1 through S_N with higher frequencies f_M+1 through f_N, and

wherein the logic circuit switches to state S_N from any of states S₁ through S_M when a number of pulses needed to charge the output stage exceeds a threshold number N_Ai for each state S₁ through S_M.

10. The power controller of claim 9, wherein the multi-state digital logic circuit switches to a next higher state from any of states S_M+1 through S_N−

1 when the number of pulses needed to charge the output stage exceeds N_Ai for each state S_M+1 through S<sub>N−

1</sub>.

11. The power controller of claim 9, wherein the multi-state digital logic circuit switches to a next lower state when the number of pulses needed to charge the output stage is less than a threshold number N_Bi for each state S₂ through S_N.

12. The power controller of claim 11, wherein N_Ai>

N_Bi for each state.

13. The power controller of claim 9, wherein the frequencies f_i are programmable.

14. The power output controller of claim 9, wherein the sensing circuit scales the output voltage prior to inputting the output voltage into a comparator.

15. The power output controller of claim 14, wherein the sensing circuit includes an op amp for scaling the output voltage prior to inputting the output voltage into the comparator.

16. The power controller of claim 9, wherein the sensing circuit includes a comparator that compares the voltage of the output stage with a reference voltage.

17. The power controller of claim 16, wherein the reference voltage is outputted by the multi-state digital logic circuit.

18. The power controller of claim 9, wherein the output stage includes a capacitor being charged by the output pulses.

19. A power controller comprising:

a sensing circuit that provides an output corresponding to a voltage of an output stage;

a pulse generator that charges the output stage; and

a digital logic circuit having N states S₁ through S_N corresponding to N pulse frequencies f_i (i=1 through N) and that controls the pulse generator based on the output of the sensing circuit, the pulse frequencies f_i monotonically increasing,

wherein the N states include states S₁ through S_M with lower frequencies f₁ through f_M and states S_M+1 through S_N with higher frequencies f_M+1 through f_N,

wherein the logic circuit switches to state S_N from any of states S₁ through S_M when a number of pulses needed to charge the output stage exceeds a threshold number N_Ai for each state S₁ through S_M,

wherein the logic circuit switches to a next higher state from any of states S_M+1 through S<sub>N−

1</sub> when a number of pulses needed to charge the output stage exceeds N_A for each state S_M+1 through S<sub>N−

1</sub>, and

wherein the logic circuit switches to a next lower state when the number of pulses needed to charge the output stage is less than a threshold number N_Bi for each state S₂ through S_N.

20. The power controller of claim 19, wherein N_Ai>

N_Bi for each state.

21. The power controller of claim 19, wherein the sensing circuit includes a comparator that compares the voltage of the output stage with a reference voltage.

22. The power output controller of claim 21, wherein the sensing circuit scales the output voltage prior to inputting the output voltage into the comparator.

23. The power controller of claim 21, wherein the sensing circuit includes an op amp for scaling the output voltage before inputting the output voltage into the comparator.

24. The power controller of claim 19, wherein the frequencies f_i are programmable.

25. The power controller of claim 19, wherein the output stage includes a capacitor being charged by the output pulses.

26. A power output controller comprising:

a sensing circuit that senses an output voltage of an output stage;

a frequency modulated pulse generator that charges the output stage; and

a multi-state digital controller that controls a frequency of pulses generated by the pulse generator based on information from the sensing circuit,

wherein the multi-state digital controller includes a logic circuit having N states S₁ through S_N corresponding to N pulse frequencies f_i (i=1 through N) and that controls output to the output stage, the pulse frequencies f_i monotonically increasing.

27. The power controller of claim 26, wherein the sensing circuit includes a comparator that compares the output voltage with a reference voltage.

28. The power output controller of claim 27, wherein the sensing circuit scales the output voltage prior to inputting the output voltage into a comparator.

29. The power controller of claim 27, wherein the sensing circuit includes an op amp for scaling the output voltage before inputting the output voltage into the comparator.

30. The power output controller of claim 26, wherein the output stage includes a capacitor being charged by the output pulses.

31. The power output controller of claim 26, wherein the multi-state controller includes a logic circuit having N states S₁ through S_N corresponding to N pulse frequencies f_i (i=1 through N) and that controls output to the output stage, the pulse frequencies f_i monotonically increasing.

32. The power output controller of claim 31, wherein the N states include M states S₁ through S_M with lower frequencies f₁ through f_M and states S_M+1 through S_N with higher frequencies f_M+1, through f_N,

wherein the logic circuit switches to state S_N from any of states S₁ through S_M when a number of pulses needed to charge the output stage exceeds a threshold number N_Ai for each corresponding state S₁ through S_M,

wherein the logic circuit switches to a next higher state from any of states S_M+1 through S_N−

1 when a number of pulses needed to charge the output stage exceeds N_Ai for each state S_M+1 through S<sub>N−

1</sub>, and

wherein the logic circuit switches to a next lower state when the number of pulses needed to charge the output stage is less than a threshold number N_Bi for each state S₂ through S_N.

33. The power controller of claim 32, wherein N_Ai>

N_Bi for each state.

34. The power controller of claim 31, wherein the frequencies f_i are programmable.

35. A method of controlling power output comprising the steps of:

sensing a voltage of an output stage;

driving a pulse generator to charge the output stage; and

controlling the pulse generator by using a multi-state digital logic circuit having N states S₁ through S_N corresponding to N pulse frequencies f_i (i=1 through N), the pulse frequencies f_i monotonically increasing,

wherein the N states include M states S₁ through S_M with lower frequencies f₁ through f_M and states S_M+1 through S_N with higher frequencies f_M+1 through f_N, and

wherein the digital logic circuit switches to state S_N from any of states S₁ through S_M when a number of pulses needed to charge the output stage exceeds a threshold number N_Ai for each state S₁ through S_M.

36. The method of claim 35, wherein the digital logic circuit switches to a next higher state from any of states S_M+1 through S_N−

1 when the number of pulses needed to charge the output stage exceeds N_Ai for each state S_M+1 through S<sub>N−

1</sub>.

37. The method of claim 36, wherein the digital logic circuit switches to a next lower state when the number of pulses needed to charge the output stage is less than a threshold number N_Bi for each state S₂ through S_N.

38. The method of claim 37, wherein N_Ai>

N_Bi for each state.

39. The method of claim 35, wherein the frequencies f_i are programmable.

40. A power output controller comprising:

an output stage;

a sensing circuit for providing an output representative of an output voltage of the output stage; and

a controller that controls output pulses that charge the output stage with a frequency selected from a plurality of discrete monotonically increasing frequencies and dependent on the output of the sensing circuit.