High-frequency multilayer circuit substrate

• US 6,856,210 B2
• Filed: 04/27/2001
• Issued: 02/15/2005
• Est. Priority Date: 04/27/2000
• Status: Expired due to Fees

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Zhu, Yu, Suematsu, Eiji
• Primary Examiner(s): Jones, Stephen E.
• Application Number:
  US09/842,768
• Publication Number:
  US 20010054939A1
• Time in Patent Office: 1,390 Days
• Field of Search: 333/246, 333/263, 333/33, 257/728
• US Class Current: 333/33
• CPC Class Codes: H01P 3/088 Stacked transmission lines
• CPC Class Codes: H05K 1/0251 related to vias or transitions between vias and transmission lines
• CPC Class Codes: H05K 2201/09718 Clearance holes
• CPC Class Codes: H05K 2201/09727 Varying width along a single conductor; Conductors or pads having different widths
• CPC Class Codes: H05K 2201/09781 Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components

Abstract

A high-frequency multilayer circuit substrate having a plurality of circuit layers includes a via hole for connection between the circuit layers, a metal pad, an impedance matching transmission line, rectangular stubs and a signal transmission line. A via hole connecting portion is constructed of the via hole, the rectangular stubs and the impedance matching transmission line. A characteristic impedance of the via hole connecting portion is matched to a characteristic impedance of the signal transmission line by adjusting widths and lengths of the impedance matching transmission line and the rectangular stubs. Thereby, the reflection of the signal wave in the via hole connecting portion is reduced to decrease a transmission loss.

Claims

1. A high-frequency multilayer circuit substrate comprising:

at least three circuit layers, an inner circuit layer of which includes a ground conductor;

a via hole penetrating the plurality of circuit layers to be connected to each other;

a via hole metal pad provided around the via hole;

a planar impedance matching circuit connected to the via hole through the via hole metal pad; and

a microstrip line being a signal transmission line, formed in at least one of the circuit layers other than the inner circuit layer, connected to the planar impedance matching circuit, wherein

a characteristic impedance of a via hole connecting portion formed by the via hole, the via hole metal pad and the planar impedance matching circuit matches a characteristic impedance of the signal transmission line,

the planar impedance matching circuit includes an impedance matching microstrip line, one end of which is connected to the via hole through the via hole metal pad and other end of which is directly connected to the microstrip line being the signal transmission line, the via hole metal pad, the planar impedance matching circuit and the microstrip line being the signal transmission line are located on the same circuit layer.

2. A high-frequency multilayer circuit substrate as set forth in claim 1, wherein

the characteristic impedance of the via hole connecting portion matches the characteristic impedance of the signal transmission line based on an adjusted width and length of the impedance matching microstrip line.

3. A high-frequency multilayer circuit substrate as set forth in claim 1, wherein

the planar impedance matching circuit is formed by the impedance matching microstrip line and stubs which are connected to both sides of the impedance matching microstrip line at the other end connected to the microstrip being the signal transmission line.

4. A high-frequency multilayer circuit substrate as set forth in claim 3, wherein

the characteristic impedance of the via hole connecting portion matches the characteristic impedance of the microstrip line being the signal transmission line based on an adjusted width and length of the impedance matching microstrip line and a width and a length of each of the stubs.

5. A high-frequency multilayer circuit substrate as set forth in claim 1, wherein

the planar impedance matching circuit is formed by a plurality of impedance matching microstrip lines having at least two different widths and connected in series to the via hole and the microstrip line being the signal transmission line.

6. A high-frequency multilayer circuit substrate as set forth in claim 5, wherein

the characteristic impedance of the via hole connecting portion matches the characteristic impedance of the microstrip line being the signal transmission line based on adjusted widths and lengths of the impedance matching microstrip lines.