Integrated driver electronic (IDE) device power control

• US 6,857,079 B2
• Filed: 02/16/2001
• Issued: 02/15/2005
• Est. Priority Date: 02/16/2001
• Status: Active Grant

• Current Assignee: Oracle America, Inc. (Oracle Corporation)
• Original Assignee: Sun Microsystems Incorporated (Oracle Corporation)
• Inventors: Chen, Rong-Dyi
• Primary Examiner(s): Browne, Lynne H.
• Assistant Examiner(s): DU, THUAN N
• Application Number:
  US09/785,927
• Publication Number:
  US 20020116652A1
• Time in Patent Office: 1,460 Days
• Field of Search: 713/300, 713/310, 713/320, 713/322, 713/323, 713/324, 713/330, 327/100, 327/108, 327/278, 327/281, 327/365, 327/376, 327/377, 327/389, 710/15, 714/24
• US Class Current: 713/324
• CPC Class Codes: G06F 1/3228 Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
• CPC Class Codes: G06F 1/3256 Power saving in optical drive
• CPC Class Codes: G06F 1/3268 Power saving in hard disk drive
• CPC Class Codes: G06F 1/3287 by switching off individual functional units in the computer system
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Methods and apparatus for power managing IDE devices. A driver is coupled to a switch, the driver receiving a control signal from a computer system, the control signal indicating whether the computer system is in a power-save mode. The driver drives the switch which generates an output control signal to an IDE device. When the operating system detects that the computer system has been idle for a certain period of time, the operating system toggles the control signal that feeds into the driver which shuts off the switch so that power feeding to the IDE device is shut off.

Claims

1. A system for controlling power usage of an integrated driver electronics (IDE) device, comprising:

a first power supply for supplying power at a first voltage;

a first switch for receiving power supplied from said first power supply at said first voltage;

an input terminal for receiving a control signal;

a first damping resistor serially connected to said input terminal, said first damping resistor damping out any possible ringing on said control signal from said input terminal to prevent a false signaling effect;

a first hardwired driver coupled to said first damping resistor and said first switch;

a first IDE device coupled to said first power supply via said first switch;

wherein said first hardwired driver receives said control signal from said first damping resistor and drives said first switch to power said first IDE device via said first power.

2. The system of claim 1, further comprising a computer, wherein said control signal indicates said computer is entering a power-save mode, wherein said first hardwired driver based on said control signal turns off said first power to said first IDE device via said first switch, and wherein said computer operates said first IDE device when said computer is not entering said power-save mode.

3. The system of claim 2, further comprising an IDE controller for controlling operation of said first IDE device from said computer, wherein said first hardwired driver and said first switch are coupled between said computer and said IDE controller.

4. The system of claim 3, wherein said IDE controller comprises a plurality of channels for supporting concurrent operation of said first IDE device and a second IDE device from said computer.

5. The system of claim 2, wherein said control signal is sent from said computer to said input terminal and wherein said computer saves a context of an operation of said first IDE device prior to sending said control signal.

6. The system of claim 1, further comprising:

a second power supply for supplying power at a second voltage;

a second switch for receiving power supplied from said second power supply at said second voltage;

a second damping resistor serially connected to said input terminal, said second damping resistor damping out any possible ringing on said control signal from said input terminal to prevent a false signaling effect;

a second hardwired driver coupled to said second damping resistor and said second switch;

a second IDE device coupled to said second power supply via said second switch;

wherein said second IDE device operates at a different voltage level than said first IDE device; and

wherein said second hardwired driver receives said control signal from said second damping resistor and drives said second switch to power said second IDE device via said second power.

7. The system of claim 1, further comprising:

a second power supply for supplying power at a second voltage;

a second switch for receiving power supplied from said second power supply at said second voltage;

a second hardwired driver coupled to said first damping resistor and said second switch;

a second IDE device coupled to said second power supply via said second switch;

wherein said second IDE device operates at a different voltage level than said first IDE device; and

wherein said second hardwired driver receives said control signal from said first damping resistor and drives said second switch to power said second IDE device via said second power.

8. The system of claim 1, wherein said first hardwired driver comprises a transistor.

9. The system of claims 8, wherein said transistor comprises a field effect transistor.

10. The system of claim 9, wherein said field effect transistor comprises a metal oxide field effect transistor.

11. The system of claim 8, wherein said transistor comprises an N-channel transistor.

12. The system of claim 8, where in said first switch comprises a second transistor.

13. The system of claim 1, wherein said first IDE device comprises one of a hard disk drive, a CD-ROM drive, and a tape drive.

14. An integrated hardwired driver electronics (IDE) device power control circuit, comprising:

a first switch for receiving power supplied at a first voltage;

a second switch for receiving power supplied at a second voltage;

an input terminal for receiving a control signal;

a damping resistor serially connected to said input terminal, said damping resistor damping out any possible ringing on said control signal from said input terminal;

a first hardwired driver coupled to said damping resistor and said first switch; and

a second hardwired driver coupled to said damping resistor and said second switch;

wherein said first hardwired driver receives said control signal from said damping resistor and drives said first switch to power a first IDE device at said first voltage; and

wherein said second hardwired driver receives said control signal from said damping resistor and drives said second switch to power a second IDE device at second voltage.

15. The system of claim 14, wherein said first hardwired driver comprises a first transistor and second hardwired driver comprises a second transistor.

16. The system of claim 15, wherein said first switch comprises a third transistor and second switch comprise a fourth transistor.

17. A method for controlling power, comprising:

supplying a power at a first voltage to a first IDE device via a first switch;

sending a first signal to an input terminal indicating a computer operating said first IDE device is entering a power-save mode;

damping out any possible ringing on said first signal via a first damping resistor serially connected to said input terminal;

receiving said damped control signal at a first hardwired driver from said first damping resistor;

generating from said first hardwired driver a second signal to turn off said power to said first IDE device; and

turning off said power to said first IDE device via said first switch.

18. The method of claim 17, further comprising:

determining if said computer has been idle for a predetermined time; and

toggling said first signal from said computer if said computer system has been idle for said predetermined time.

19. The method of claim 18, further comprising saving a context of an operation of said first IDE device by said computer to a memory prior to said computer entering said power-save mode.

20. The method of claim 17, further comprising:

supplying a second power at a second voltage to a second IDE device via a second switch;

sending said first signal to said input terminal indicating said computer operating said second IDE device is entering a power-save mode;

damping out any possible ringing on said first signal via a second damping resistor serially connected to said input terminal;

receiving said damped control signal at a second hardwired driver from said second damping resistor;

generating from said second hardwired driver a third signal to turn off said second power to said second IDE device; and

turning off said second power to said second IDE device via said second switch.