Method of depositing barrier layer for metal gates

• US 6,858,524 B2
• Filed: 05/05/2003
• Issued: 02/22/2005
• Est. Priority Date: 12/03/2002
• Status: Active Grant

• Current Assignee: ASM International NV
• Original Assignee: ASM International NV
• Inventors: Haukka, Suvi, Huotari, Hannu
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): LINDSAY JR, WALTER LEE
• Application Number:
  US10/430,811
• Publication Number:
  US 20040104439A1
• Time in Patent Office: 659 Days
• Field of Search: 438/585, 438/230, 438/686, 438/627, 438/592, 438/780, 438/287, 438/683
• US Class Current: 438/585
• CPC Class Codes: H01L 21/28088 the final conductor layer next to the insulator being a composite, e.g. TiN
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28194 by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition H01L21/28202 takes precedence
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/28238 with sacrificial oxide
• CPC Class Codes: H01L 21/823828 with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 29/4966 the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2 H01L29/4908, H01L29/4983 take precedence
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Abstract

A method of manufacturing a high performance MOS device and transistor gate stacks comprises forming a gate dielectric layer over a semiconductor substrate; forming a barrier layer over the gate dielectric layer by an ALD type process; and forming a gate electrode layer over the barrier layer. The method enables the use of hydrogen plasma, high energy hydrogen radicals and ions, other reactive radicals, reactive oxygen and oxygen containing precursors in the processing steps subsequent to the deposition of the gate dielectric layer of the device. The ALD process for forming the barrier layer is performed essentially in the absence of plasma and reactive hydrogen radials and ions. This invention makes it possible to use oxygen as a precursor in the deposition of the metal gates. The barrier film also allows the use of hydrogen plasma in the form of either direct or remote plasma in the deposition of the gate electrode. Furthermore, the barrier film prevents the electrode material from reacting with the gate dielectric material. The barrier layer is ultra thin and, at the same time, it forms a uniform cover over the entire surface of the gate dielectric.

Claims

1. A method of manufacturing a gate stack in an integrated circuit comprising:

depositing a gate dielectric layer over a semiconductor substrate;

depositing a barrier layer over the gate dielectric layer by an atomic layer deposition (ALD) type process essentially in the absence of direct plasma, reactive hydrogen radicals and ions; and

depositing a gate electrode over the barrier layer.

2. The method of claim 1, wherein the barrier layer comprises a conductive material.

3. The method of claim 1, wherein the barrier layer comprises a metal that is present in the dielectric layer.

4. The method of claim 1, wherein the barrier layer is a metal nitride.

5. The method of claim 4, wherein the barrier layer comprises a material selected from the group consisting of TiN, TaN, and HfN.

6. The method of claim 4, additionally comprising annealing the metal nitride layer.

7. The method of claim 1, wherein the barrier layer comprises an alloy of a group IV element and a second metal, and nitrogen.

8. The method of claim 7, wherein the barrier layer comprises a material selected from the group consisting of HfSi_xN_y, TiSi_xN_y, TaSi_xN_y, WN_xC_y and HfAl_xN_y.

9. The method of claim 1, wherein the barrier layer has a thickness equal to or less than 80 Å

.

10. The method of claim 9, wherein the thickness of the barrier layer is equal to or less than 30 Å

.

11. The method of claim 1, wherein the gate dielectric is a metal oxide.

12. The method of claim 11, wherein the barrier film comprises a material containing nitrogen, the method further comprising the step of treating the gate dielectric with a nitrogen containing gas prior to the depositing of the barrier film.

13. The method of claim 12, wherein treating the gate dielectric with a nitrogen containing gas comprises treating the dielectric layer with ammonia gas.

14. The method of claim 13, wherein the gate dielectric is HfO₂ and the barrier film is HfN.

15. The method of claim 12, wherein treating the gate dielectric with a nitrogen containing gas comprises treating the dielectric layer with nitrogen containing radicals.

16. The method of claim 12, wherein the barrier layer comprises a metal nitride including, a metal of the metal oxide of the gate dielectric layer.

17. The method of claim 1, wherein the ALD type process is plasma enhanced ALD utilizing a remote plasma.

18. The method of claim 1, wherein the ALD type process is a thermal ALD process.

19. The method of claim 1, additionally comprising treating the dielectric layer to remove OH groups on the surface prior to depositing of the barrier layer.