Digital sampling instrument employing cache memory

• US 6,858,790 B2
• Filed: 02/21/2002
• Issued: 02/22/2005
• Est. Priority Date: 01/05/1990
• Status: Expired due to Term

• Current Assignee: Creative Technology Ltd.
• Original Assignee: Creative Technology Ltd.
• Inventors: Rossum, David P.
• Primary Examiner(s): Fletcher, Marlon T.
• Assistant Examiner(s): Warren, David S.
• Application Number:
  US10/080,527
• Publication Number:
  US 20020194976A1
• Time in Patent Office: 1,097 Days
• Field of Search: 846/03, 84604-607, 846/02, 708/290, 708/420
• US Class Current: 84/603
• CPC Class Codes: G10H 2230/031 Use of cache memory for electrophonic musical instrument processes, e.g. for improving processing capabilities or solving interfacing problems
• CPC Class Codes: G10H 2250/145 Convolution, e.g. of a music input signal with a desired impulse response to compute an output transforms, i.e. mathematical transforms into domains appropriate for musical signal processing, coding or compression G10H2250/215
• CPC Class Codes: G10H 2250/545 Aliasing, i.e. preventing, eliminating or deliberately using aliasing noise, distortions or artifacts in sampled or synthesised waveforms, e.g. by band limiting, oversampling or undersampling, respectively
• CPC Class Codes: G10H 2250/621 Waveform interpolation
• CPC Class Codes: G10H 7/08 by calculating functions or polynomial approximations to evaluate amplitudes at successive sample points of a tone waveform
• CPC Class Codes: G10H 7/12 by means of a recursive algorithm using one or more sets of parameters stored in a memory and the calculated amplitudes of one or more preceding sample points

Abstract

A digital sampling instrument for multi-channel interpolatative playback of digital audio data stored in a waveform memory provides improved interpolation of musical sounds by use of a cache memory.

Claims

1. A method for the multichannel interpolative playback of digital waveform data samples stored in a waveform memory, comprising:

accessing said waveform memory samples from said waveform memory using an address update unit and a memory access unit;

storing two or more waveform memory samples for each channel in a cache memory;

linearly interpolating between two adjacent waveform memory samples stored in said cache memory to form a linear interpolation result; and

operating said memory access unit asynchronously from said address update unit and said linearly interpolating.

2. The method of claim 1 wherein said accessing further comprises:

incrementing a current address for each channel and addressing the waveform memory using at least a portion of said current address.

3. The method of claim 1 wherein said accessing can operate in a burst mode.

4. The method of claim 1 further comprising:

overwriting data in said cache memory for a channel that is no longer required for interpolating for a given sample point.

5. A method for implementing an interpolator for multichannel interpolative playback of digital waveform data samples stored in a waveform memory operating in waveform memory cycles, comprising:

accessing said waveform data samples in said waveform memory, said accessing including producing a bus request signal and responding to a bus acknowledge signal;

storing two or more waveform memory samples for each channel in a cache memory;

accessing two adjacent ones of said waveform memory samples from said cache memory;

linearly interpolating between said two adjacent waveform memory samples to form a linear interpolation result; and

responding to said bus request signal with memory interface logic;

producing said bus acknowledge signal with said memory interface logic; and

determining, with said memory interface logic, if said interpolator has control of the waveform memory during any given one of said waveform memory cycles.

6. A digital sampling instrument for the multichannel interpolative playback of digital waveform data samples stored in a waveform memory operating in waveform memory cycles, comprising:

a memory interface for accessing said waveform memory, including producing and responding to bus request signals and producing and responding to bus acknowledge signals, said memory interface determining if said digital sampling instrument has control of the waveform memory during any given one of said waveform memory cycles;

a cache memory storing two or more waveform memory samples for each channel;

control logic to access two adjacent ones of said waveform memory samples from said cache memory;

circuitry configured to linearly interpolate between said two adjacent waveform memory samples to form a linear interpolation result.

7. The digital sampling instrument of claim 6 further comprising memory address and control signals capable of being output disabled in response to said bus acknowledge signal.

8. The digital sampling instrument of claim 6 further comprising:

a shared bus coupling said digital sampling instrument to said waveform memory.

9. The digital sampling instrument of claim 6 wherein said control logic addresses said cache memory for read and write operations such that a write operation overwrites data for a channel that has already been read for a given sample point.

10. The digital sampling instrument of claim 9 wherein a write operation overwrites a waveform sample for the same channel.

11. The digital sampling instrument of claim 9 wherein said control logic addresses said cache memory with an address having more significant bits corresponding to a channel, and less significant bits corresponding to a portion of an address for a waveform sample for said channel.

12. A system for the multichannel interpolative playback as output samples of digital waveform data stored in a waveform memory, comprising:

coefficient logic for generating N coefficients for each channel for each of said output samples;

an interpolator circuit sharing said waveform memory with one or more other circuits, and computing a sum of N products of the contents of said waveform memory times said coefficients for each of several ones of said channels;

said interpolator circuit producing a bus request signal and responsive to a bus acknowledge signal;

memory interface logic responsive to said bus request signal and producing said bus acknowledge signal for determining if said interpolator circuit has control of the waveform memory during any given one of a pluralilty of waveform memory cycles; and

an output for providing said sum of products for each of said channels.

13. A system as in claim 12 further comprising:

a shared bus coupling said system to said waveform memory.

14. A system as in claim 12 further comprising a cache memory having a size sufficient to store two or more waveform samples for a plurality of said channels.