Efficient ESD protection with application for low capacitance I/O pads
First Claim
1. A semiconductor device for protecting an integrated circuit input/output pad against ESD events, comprising:
- a substrate of a first conductivity type, said substrate having a resistivity;
a multi-finger MOS transistor in said substrate, said MOS transistor comprising a source region, connected to ground potential, a gate region, connected to ground potential, and a drain region, connected to said pad;
a well of the opposite conductivity type in said substrate, said well positioned in close proximity to said transistor regions;
an interdigitated diode in said well, said diode having a plurality of anode regions of said first conductivity type, connected to said pad and said drain, and a plurality of cathode regions of said opposite conductivity type, connected to power;
each transistor region aligned with a corresponding diode region such that said diode-anode regions are positioned at a close proximity to said source regions, and said diode-cathode regions positioned at said close proximity to said drain regions;
each of said transistor and diode regions, respectively, coupled by said proximity and said connections, creating a localized parasitic silicon-controlled rectifier (SCR) comprising an SCR-anode formed by said diode-anode, a first base region formed by said well, a second base region formed by said substrate, and an SCR-cathode formed by said transistor source, said SCR operable to distribute an ESD current at low voltage.
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Accused Products
Abstract
A semiconductor device for ESD protection of an input/output pad (301) of an integrated circuit built in a substrate of a first conductivity type comprising a multi-finger MOS transistor (304), its source (304b) and its gate (304c) connected to ground potential and its drain (304a) connected to the I/O pad. A well of the opposite conductivity type, partially separated from the substrate by shallow trench isolations, has a diode (302), its anode (302b) connected to the pad and also to the transistor drain, and its cathode (302a) connected to power 303). These transistor and diode connections create a parasitic silicon controlled rectifier (SCR) with the SCR-anode (310a) formed by the diode anode, the first base region formed by the well, the second base region formed by the substrate, and the SCR-cathode (311a) formed by the transistor source. The SCR structure provides a significantly lower clamping voltage and an about two times higher failure current than a substrate-pumped MOS transistor.
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Citations
19 Claims
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1. A semiconductor device for protecting an integrated circuit input/output pad against ESD events, comprising:
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a substrate of a first conductivity type, said substrate having a resistivity;
a multi-finger MOS transistor in said substrate, said MOS transistor comprising a source region, connected to ground potential, a gate region, connected to ground potential, and a drain region, connected to said pad;
a well of the opposite conductivity type in said substrate, said well positioned in close proximity to said transistor regions;
an interdigitated diode in said well, said diode having a plurality of anode regions of said first conductivity type, connected to said pad and said drain, and a plurality of cathode regions of said opposite conductivity type, connected to power;
each transistor region aligned with a corresponding diode region such that said diode-anode regions are positioned at a close proximity to said source regions, and said diode-cathode regions positioned at said close proximity to said drain regions;
each of said transistor and diode regions, respectively, coupled by said proximity and said connections, creating a localized parasitic silicon-controlled rectifier (SCR) comprising an SCR-anode formed by said diode-anode, a first base region formed by said well, a second base region formed by said substrate, and an SCR-cathode formed by said transistor source, said SCR operable to distribute an ESD current at low voltage. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A semiconductor device for ESD protection of an input/output pad, comprising:
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a substrate of a first conductivity type said substrate having a resistivity;
a multi-finger MOS transistor in said substrate, said MOS transistor comprising a source region, connected to ground potential, a gate region, connected to ground potential, and a drain region, connected to power;
a first well of the opposite conductivity type in said substrate, said well positioned in close proximity to said transistor regions;
a first interdigitated diode in said first well, said first diode having a plurality of first anode regions of said first conductivity type, connected to said pad, and a plurality of first cathode regions of said opposite conductivity type, connected to power;
each transistor region aligned with a corresponding first diode region such that said first diode-anode regions are positioned at a close proximity to said source regions, and said first diode-cathode regions positioned at said close proximity to said drain regions;
each of said transistor and first diode regions, respectively, coupled by said proximity and said connections, creating a localized parasitic silicon-controlled rectifier (SCR) comprising an SCR-anode formed by said first diode anode, a first base region formed by said first well, a second base region formed by said substrate, and an SCR-cathode formed by said transistor source;
a second well of the opposite conductivity type in said substrate; and
a second diode in said second well, said second diode having a second anode, connected to ground potential, and a second cathode, connected to said pad. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification