Active matrix substrate and manufacturing method thereof

• US 6,859,252 B2
• Filed: 02/24/2004
• Issued: 02/22/2005
• Est. Priority Date: 07/10/2000
• Status: Expired due to Term

• Current Assignee: AU Optronics Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Tsujimura, Takatoshi, Morooka, Mitsuo, Tokuhiro, Osamu, Miwa, Kohichi
• Primary Examiner(s): Ton, Toan
• Assistant Examiner(s): DUONG, TAI V
• Application Number:
  US10/786,925
• Publication Number:
  US 20040165121A1
• Time in Patent Office: 364 Days
• Field of Search: 349/43, 349/48, 349/47, 349/187, 349/46, 257/57, 257/59, 257/72, 438/30, 438/149, 438/151, 438/158, 438/161, 438/48
• US Class Current: 349/187
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: G02F 2201/123 pixel

Abstract

An active matrix substrate includes a gate electrode, a gate insulating film, a semiconductor layer, a source electrode and a drain electrode, which are sequentially deposited on an insulating substrate. A transparent conductive layer is deposited on the source and drain electrodes so that the transparent conductive layer includes a portion deposited to be substantially the same pattern as those of the source and drain electrodes. The transparent conductive layer is connected to either the source electrode or the drain electrode to form a pixel electrode. A gate line is further included on which the gate insulating film is deposited. The gate line is to be connected to the gate electrode.

Claims

1. A method for manufacturing an active matrix substrate in which a source electrode, a drain electrode, a semiconductor layer, a gate insulating film and a gate electrode are sequentially deposited on an insulating substrate directly or indirectly, comprising the steps of:

patterning a gate metal deposited on said gate insulating film by the use of a resist mask;

patterning said gate insulating film and said semiconductor layer by using said patterned gate metal as a mask;

forming an ITO film and patterning the ITO film by using a resist mask; and

patterning said gate electrode by using said patterned ITO film as a mask.

2. The method according to claim 1, wherein the step of patterning said ITO film includes a step of patterning said ITO film in consideration of a pattern of said gate electrode as well as forming a pattern of a pixel electrode.

3. The display device according to claim 2, wherein the step of forming said ITO film is formed in the same step of forming an ITO film constituting said pixel electrode.

4. The method according to claim 2, wherein the step of patterning said ITO film includes a step for patterning said ITO film in consideration of a pattern of a gate line connected to said gate electrode.

5. A method of manufacturing an active matrix substrate comprising the steps of:

forming a pattern of a gate electrode on an insulating substrate;

sequentially depositing a gate insulating film and a semiconductor layer on said gate electrode and then forming a metal film;

depositing an ITO film in consideration of a pattern of said metal film to be patterned and in consideration of a pattern of a pixel electrode; and

patterning said metal film by using said ITO film as a mask thus forming a source electrode and a drain electrode; and

providing a protection film on said source and drain electrodes to interpose the ITO film therebetween, and patterning said semiconductor layer by using said protection film.

6. The method according to claim 5, further comprising the step of:

forming a pattern of a data line by using said ITO film as a mask in the step of forming said source electrode and said drain electrode.

7. The method according to claim 5, wherein the step of forming said metal film is for forming said metal film in the same pattern as that of the patterned gate insulating film.

8. A method of manufacturing an active matrix substrate comprising the steps of:

forming a pattern of a gate electrode on an insulating substrate;

sequentially depositing a gate insulating film and a semiconductor layer on said gate electrode and then forming a metal film;

depositing an ITO film in consideration of a pattern of said metal film to be patterned and in consideration of a pattern of a pixel electrode; and

patterning said metal film by using said ITO film as a mask thus forming a source electrode and a drain electrode;

wherein the step of forming said metal film is for forming said metal film in the same pattern as that of the patterned gate insulating film.

9. The method according to claim 8, further comprising the step of:

forming a pattern of a data line by using said ITO film as a mask in the step of forming said source electrode and said drain electrode.

10. The method according to claim 9, further comprising the step of:

providing a protection film on said source and drain electrodes to interpose the ITO film therebetween, and patterning said semiconductor layer by using said protection film.