Method and apparatus for wafer level testing of integrated optical waveguide circuits

• US 6,859,587 B2
• Filed: 12/28/2001
• Issued: 02/22/2005
• Est. Priority Date: 12/28/2001
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Nikonov, Dmitri E., McCormack, Mark T.
• Primary Examiner(s): Kim, Ellen E.
• Application Number:
  US10/041,038
• Publication Number:
  US 20030123804A1
• Time in Patent Office: 1,152 Days
• Field of Search: 385 49- 52, 385/14
• US Class Current: 385/49
• CPC Class Codes: G01M 11/37 in which light is projected perpendicularly to the axis of the fibre or waveguide for monitoring a section thereof

Abstract

A method of testing a planar lightwave circuit is achieved by coupling an optical probe to the planar lightwave circuit. In one embodiment, a second probe is used in combination with the first probe to test the planar lightwave circuit by sending and receiving a light beam through the planar lightwave circuit.

Claims

1. A method of testing a planar lightwave circuit comprising:

coupling a first optical probe having a side-polished optical fiber to the planar lightwave circuit; and

testing an optical pathway within the planar lightwave circuit by transmitting or receiving light through the first optical probe, wherein testing the optical pathway within the planar lightwave circuit is performed on a wafer prior to dicing the PLC wafer.

2. The method of claim 1 further comprising:

coupling a second optical probe having a second side-polished optical fiber to the planar lightwave circuit; and

using the second optical probe in combination with the first optical probe to send and receive a light beam through the planar lightwave circuit.

3. The method of claim 1 further comprising:

using an index-matching fluid as an interface between the first optical probe and the planar lightwave circuit.

4. The method of claim 1 further comprising:

adding an additional layer of upper cladding to the planar lightwave circuit after removing the first optical probe.

5. The method of claim 1, wherein testing the optical pathway within the planar lightwave circuit is performed on a PLC die prior to permanently attaching optical fibers to the PLC die.

6. The method of claim 1, wherein testing the optical pathway within the planar lightwave circuit is performed on a PLC die after permanently attaching optical fibers to the PLC die.

7. A method of testing a planar lightwave circuit comprising:

coupling a first optical probe to a first portion of the planar lightwave circuit;

directing a light beam through the first optical probe into the planar lightwave circuit;

coupling a second optical probe to a second portion of the planar lightwave circuit; and

receiving the light beam through the second optical probe, wherein the first and second optical probes comprise side-polished optical fibers.

8. The method of claim 7 further comprising:

using an index-matching fluid as an interface between the first optical probe and the planar lightwave circuit.

9. The method of claim 7, wherein the first probe is positioned with six degrees of freedom.

10. The method of claim 7, wherein the second optical probe is positioned with six degrees of freedom.

11. The method of claim 7, wherein directing the light beam through the first optical probe into the planar lightwave circuit is accomplished by coupling a laser to the first optical probe.

12. The method of claim 7, wherein the planar lightwave circuit is performed on a PLC wafer comprising multiple identical PLC dice.

13. The method of claim 7, wherein testing the planar lightwave circuit is performed on a PLC die prior to permanently attaching optical fibers to the PLC die.

14. The method of claim 7, wherein testing the planar lightwave circuit is performed on a PLC die after permanently attaching optical fibers to the PLC die.