Method and system for managing data at an input/output interface for a multiprocessor system

• US 6,859,863 B1
• Filed: 07/20/2001
• Issued: 02/22/2005
• Est. Priority Date: 07/20/2000
• Status: Expired due to Term

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: Silicon Graphics Incorporated (Graphics Properties Holdings, Inc.)
• Inventors: Huffman, William A., Kuskin, Jeffrey S., Miller, Steven C.
• Primary Examiner(s): Padmanabhan, Mano
• Assistant Examiner(s): BAKER, PAUL A
• Application Number:
  US09/910,631
• Time in Patent Office: 1,313 Days
• Field of Search: 711/133, 711/138, 711/141
• US Class Current: 711/145
• CPC Class Codes: G06F 12/0817 using directory methods
• CPC Class Codes: G06F 12/1458 by checking the subject access rights
• CPC Class Codes: G06F 2212/621 Coherency control relating to peripheral accessing, e.g. from DMA or I/O device

Abstract

A multiprocessor system and method includes a processing sub-system including a plurality of processors and a processor memory system. A network is operable to couple the processing sub-system to an input/output (I/O) sub-system. The I/O sub-system includes a plurality of I/O interfaces each operable to couple a peripheral device to the multiprocessor system. The I/O interfaces each include a local memory operable to store a copy of data from the processor memory system for use by a corresponding peripheral device and to delete the copy at a first time event. A directory for the processor is operable to identify the data as owned upon providing the copy to the I/O sub-system and to identify the data as unowned at a second time event.

Claims

1. A multiprocessor system, comprising:

a processing sub-system including a plurality of processors and a processor memory system;

a network operable to couple the processing sub-system to an input/output (I/O) sub-system;

the sub-system including a plurality of I/O interfaces each operable to couple a peripheral device to the multiprocessor system;

the interfaces each including a local memory operable to store a copy of data from the processor memory for use by a corresponding peripheral device and to invalidate the copy at a first time event;

a directory for processor memory system, the directory operable to identify the data as owned upon providing the copy to the I/O sub-system and to identify the data as unowned at a second time event; and

wherein the invalidation of data in an I/O interface and the directory identifying the data as unowned are performed without notification messaging between the I/O interface and directory.

2. The multiprocessor system of claim 1, wherein the first and second time event occur at the same time.

3. The multiprocessor system of claim 1, wherein the first and second time event comprise expiration of a predefined period of time after an initiation event.

4. The multiprocessor system of claim 1, wherein the network is a scalable network.

5. The multiprocessor system of claim 4, wherein the scalable network comprises a plurality of routers.

6. The multiprocessor system of claim 1, wherein the processor memory system comprises a plurality of discrete processor memories.

7. The multiprocessor system of claim 6, wherein the discrete processor memories are each dedicated to a processor.

8. A multiprocessor system, comprising:

processing sub-system including a plurality of processors and a processor memory system;

a network operable to couple the processing sub-system to an input/output (I/O) sub-system;

the I/O sub-system including a plurality of I/O interfaces each operable to couple a peripheral device to the multiprocessor system;

the I/O interfaces each including a local memory operable to store a copy of data from the processor memory for use by a corresponding peripheral device and to invalidate the copy at a first time event; and

a directory for the processor memory system, the directory operable to identify the data as owned upon providing the copy to the I/O sub-system and to identify the data as unowned at a second time event;

wherein the copy of the data is provided to the I/O interface in a exclusive read-only state.

9. A method for managing data in an input/output (I/O) interface for a multiprocessor system, comprising:

coupling a plurality of processors to a processor memory system;

coupling a plurality of I/O interfaces to the processor memory system;

coupling a peripheral device to each I/O interface;

storing a copy of data from the processor memory system in an I/O interface for use by a corresponding peripheral device;

invalidating the copy in the I/O interface at a first time event;

identifying the data as owned upon providing the copy to the I/O interface;

automatically identifying the data as unowned at a second time event; and

wherein the invalidation of data in the I/O interface and identifying the data in the processor memory system as unowned are performed without notification messaging between the I/O interface and processor memory system.

10. The method of claim 9, wherein the first time event and second time event occur at a same time.

11. The method of claim 9, wherein the first and second time event comprise expiration of a predefined period of time after an initiation event.

12. The method of claim 11, wherein the initiation event comprises a time of initiation of a request for the copy of the data from the processor memory system.

13. The method of claim 9, further comprising coupling the I/O interfaces to the processor memory system through a scalable network.

14. The method of claim 9, further comprising coupling the I/O interfaces to the processor memory system through a scalable network comprising a plurality of routers.

15. The method of claim 9, wherein the processor memory system comprises a plurality of discrete processor memories.

16. The method of claim 15, wherein each discrete processor memory is dedicated to a processor.

17. A method for managing data in an input/output (I/O) interface for a multiprocessor system, comprising:

coupling a plurality of processors to a processor memory system;

coupling a plurality of I/O interfaces to the processor memory system;

coupling a peripheral device to each I/O interface;

storing a copy of data from the processor memory system in an I/O interface for use by a corresponding peripheral device;

invalidating the copy in the I/O interface at a first time event;

identifying the data as owned upon providing the copy to the I/O interface; and

automatically identifying the data as unowned at a second time event;

wherein the copy of the data is provided to the I/O interface in an exclusive read-only state.

18. A computer system, comprising:

a main system memory operable to store system data;

a remote memory operable to store copies of data from the main system memory for use by a remote device; and

a memory protocol operable to provide a copy of data to the remote memory from the main system memory, to automatically delete the copy from the remote memory after a period of time and to automatically update a status of the data at the main system memory upon expiration of the period of time without notification messaging between the main system memory and the remote memory.

19. The computer system of claim 18, wherein the remote memory comprises a local cache of a input/output (I/O) interface for a peripheral device.

20. The computer system of claim 18, wherein the copy of the data is provided to the remote memory in an exclusive read-only state.

21. A system for managing data at an input/output (I/O) interface for a computer system, comprising:

a computer processable medium; and

logic stored on the computer processable medium, the logic operable to provide a copy of data stored in a system memory to a remote memory, to automatically invalidate the copy in the remote memory after a predefined period of time without notification messaging between the system memory and the remote memory, and to automatically update a status of the data in the system memory after the period of time.

22. A system for managing data at an input/output (I/O) interface for a computer system, comprising:

a computer processable medium; and

logic stored on the computer processable medium, the logic operable to provide a copy of data stored in a system memory to a remote memory, to automatically invalidate the copy in the remote memory after a predefined period of time, and to automatically update a status of the data in the system memory after the period of time;

wherein the data is provided to the I/O memory in an exclusive read-only state.