Data communication system with self-test facility

• US 6,862,701 B2
• Filed: 03/06/2001
• Issued: 03/01/2005
• Est. Priority Date: 03/06/2001
• Status: Active Grant

• Current Assignee: Keysight Technologies, Inc.
• Original Assignee: Agilent Technologies, Inc.
• Inventors: Thaler, Patricia A., Walker, Richard C.
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): Kerveros, James C.
• Application Number:
  US09/801,031
• Publication Number:
  US 20020129307A1
• Time in Patent Office: 1,456 Days
• Field of Search: 714/715, 714/712, 714/716, 714/717, 714/735, 714/736, 714/739, 714/762
• US Class Current: 714/715
• CPC Class Codes: H04L 1/203 Details of error rate determination, e.g. BER, FER or WER
• CPC Class Codes: H04L 1/241 using pseudo-errors
• CPC Class Codes: H04L 1/242 by comparing a transmitted test signal with a locally generated replica
• CPC Class Codes: H04L 1/244 test sequence generators

Abstract

Self testing of a data communication system that includes a presettable scrambler and a complementary presettable descrambler is performed by presetting the presettable scrambler to a preset state. A seed payload field is scrambled using the presettable scrambler to generate fields of a test sequence. The fields of the test sequence are transmitted and corresponding received test sequence fields are received. The received test sequence fields are descrambled using the presettable descrambler to generate respective recovered test sequence fields. Differences between the recovered test sequence fields and the seed payload field are then detected as errors. In an embodiment, the seed payload field and the preset state of the presettable scrambler are chosen to generate a test sequence that imposes a known stress, such as a given run length, to the data communication system.

Claims

1. A method for self-testing a data communication system that includes a presettable scrambler and a complementary presettable descrambler, the method comprising:

presetting the presettable scrambler to a preset state;

scrambling a seed payload field using the presettable scrambler to generate fields of a test sequence;

transmitting the fields of the test sequence and receiving corresponding received test sequence fields;

descrambling the received test sequence fields using the presettable descrambler to generate respective recovered test sequence fields; and

detecting differences between the recovered test sequence fields and the seed payload field as errors.

2. The method of claim 1, in which, in presetting the presettable scrambler and scrambling the seed payload field, a combination of the preset state and the seed payload field causes the presettable scrambler to generate the test sequence to include a desired bit pattern.

3. The method of claim 2, in which, in which, in scrambling the seed payload field, a sequence of different seed payload fields is scrambled to generate the test sequence to include corresponding different desired bit patterns.

4. The method of claim 3, in which:

in scrambling a seed payload field, a first one of the seed payload fields is scrambled to generate a first test sequence having a first end bit sequence; and

presetting the presettable scrambler to a preset state includes;

detecting the first end bit sequence, and, when the first end bit sequence is detected;

presetting the presettable scrambler to the preset state,

in scrambling the seed payload field, changing the one of the seed payload fields that is scrambled from the first one of the seed payload fields to a second one of the seed payload fields to generate a second test sequence having a second end bit sequence, and

in detecting the first end bit sequence, changing the end bit sequence that is detected from the first end bit sequence to the second end bit sequence.

5. The method of claim 1, in which, in scrambling a seed payload field, the seed payload field is an Idle payload field.

6. The method of claim 1, in which, in scrambling a seed payload field, the seed payload field is a Local Fault payload field.

7. The method of claim 1, in which presetting the presettable scrambler to a preset state includes:

detecting an end bit sequence in the test sequence; and

presetting the presettable scrambler to the preset state when the end bit sequence is detected.

8. The method of claim 7, additionally comprising:

detecting the end bit sequence in the recovered test sequence fields; and

presetting the presettable descrambler to the preset state when the end bit sequence is detected.

9. The method of claim 1, in which:

transmitting the fields of the test sequence includes forming frames, each of the frames including synchronizing bits and one of the fields of the test sequence; and

receiving the corresponding received test sequence fields includes synchronizing to the synchronizing bits.

10. The method of claim 1, in which:

the test sequence is part of a larger test sequence having a cycle time substantially greater than a desired cycle time, the larger test sequence having an end; and

the method additionally includes presetting the presettable scrambler to the preset state prior to the end of the larger test sequence to provide the test sequence with the desired cycle time.

11. A method of generating a test sequence in a data transmitter that includes a scrambler, the method comprising:

in a normal operating mode;

scrambling payload fields using the scrambler to generate respective scrambled payload fields, and

transmitting the scrambled payload fields; and

in a self-test operating mode;

scrambling a seed payload field using the scrambler to generate fields of the test sequence, and

transmitting the fields of the test sequence.

12. The method of claim 11, in which:

the scrambler is a presettable scrambler;

the method additionally comprises presetting the presettable scrambler to a preset state; and

in presetting the presettable scrambler and in scrambling the seed payload field, a combination of the preset state and the seed payload field causes the presettable scrambler to generate the test sequence to include a desired bit pattern.

13. The method of claim 12, in which, in which, in scrambling a seed payload field, a sequence of different seed payload fields is scrambled using the presettable scrambler to generate the test sequence to include corresponding different desired bit patterns.

14. The method of claim 12, in which presetting the presettable scrambler to a preset state includes:

detecting an end bit sequence in the test sequence; and

presetting the scrambler to the preset state when the end bit sequence is detected.

15. The method of claim 11, in which transmitting the fields of the test of the test sequence includes forming frames, each of the frames including synchronizing bits and one of the fields of the test sequence.

16. A method of self-testing a data receiver that includes a descrambler, the method comprising:

in a normal operating mode, receiving scrambled payload fields as received payload fields, and descrambling the received payload fields using the descrambler; and

in a self-test operating mode;

receiving received test sequence fields generated by scrambling a seed payload field,

descrambling the received test sequence fields using the descrambler to generate respective recovered test sequence fields, and

detecting differences between the recovered test sequence fields and the seed payload field as errors.

17. The method of claim 16, in which:

the descrambler is a presettable descrambler; and

the method additionally comprises presetting the presettable descrambler to a preset state.

18. The method of claim 17, in which presetting the presettable descrambler to a preset state includes:

detecting an end bit sequence in the received test sequence fields; and

presetting the presettable descrambler to the preset state when the end bit sequence is detected.

19. A data communication system having a built-in self-test facility, the data communication system comprising:

a seed payload field source;

a presettable scrambler including an input connected to the seed payload field source and an output coupled to a data transmission medium, the presettable scrambler being presettable to a preset state;

a presettable descrambler including an input coupled to the transmission medium and an output; and

an error detector including an input connected to the output of the presettable descrambler, the error detector operating to generate an error indication when a recovered test sequence field output by the presettable descrambler differs from the seed payload field.

20. The data communication system of claim 19, in which a combination of the seed payload field and the preset state of the presettable scrambler is selected to cause the presettable scrambler to output at least one desired bit pattern.

21. The data communication system of claim 20, in which the seed payload field generator is configured to generate a sequence of different seed payload fields to cause the presettable scrambler to output corresponding different desired bit patterns.

22. The data communication system of claim 19, in which the seed payload field is an Idle payload field.

23. The data communication system of claim 19, in which the seed payload field is a Local Fault payload field.

24. The data communication system of claim 19, additionally comprising:

a detector that detects an end bit sequence generated by the presettable scrambler; and

a controller that operates in response to the detector to preset the presettable scrambler to the preset state.

25. The data communication system of claim 24, additionally comprising:

an additional detector that detects the end bit sequence at the input of the presettable descrambler; and

an additional controller that operates in response to the detector to preset the presettable descrambler to the preset state.

26. The data communication system of claim 19, in which:

the presettable scrambler generates fields of a test sequence by scrambling the seed payload field; and

the data communication system additionally comprises a frame assembler interposed between the output of the presettable scrambler and the transmission medium, the frame assembler operating to form frames, each of the frames including synchronizing bits and one of the fields of the test sequence.

27. A data transmitter having a built-in self-test facility, the data transmitter comprising, comprising:

a payload field source;

a seed payload field source; and

a scrambler that operates in a normal operating mode to receive payload fields from the payload field source and to scramble the payload fields to generate respective scrambled payload fields for transmission, and that alternatively operates in a self-test operating mode to receive a seed payload field from the seed payload field source and to scramble the seed payload field to generate fields of a test sequence for transmission.

28. The data transmitter of claim 27, in which:

the scrambler is a presettable scrambler capable of being preset to a preset state; and

a combination of the preset state and the seed payload field causes the presettable scrambler to generate the test sequence to include a desired bit pattern.

29. The data transmitter of claim 28, in which, the seed payload field generator is configured to generate a sequence of different seed payload fields to cause the presettable scrambler to generate the test sequence to include corresponding different desired bit patterns.

30. The data transmitter of claim 28, additionally comprising:

a detector that detects an end bit sequence in the test sequence; and

a controller that presets the presettable scrambler to the preset state when the detector detects the end bit sequence.

31. The data transmitter of claim 27, additionally comprising a frame assembler coupled to the scrambler and configured to form frames, each of the frames including synchronizing bits and one of the fields of the test sequence.

32. A data receiver having a built-in self-test facility, the data receiver comprising:

a descrambler including an output, the descrambler operating in a normal operating mode to descramble received payload fields to generate respective recovered payload fields, and alternatively operating in a self-test operating mode to descramble received test sequence fields generated by scrambling a seed payload field generator to generate respective recovered test sequence fields; and

an error detector including an input connected to the output of the descrambler, the error detector operating to generate error indications when the recovered test sequence fields differ from the seed payload field.

33. The data receiver of claim 32, in which:

the descrambler is a presettable descrambler; and

the data receiver additionally comprises a controller that operates occasionally to preset the presettable descrambler to preset state.

34. The data receiver of claim 33, in which:

the controller includes a detector operating to detect an end bit sequence in the recovered test sequence fields; and

the controller operates to preset the presettable scrambler to the preset state when the detector detects the end bit sequence.