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DRAM cell with enhanced SER immunity

  • US 6,864,136 B2
  • Filed: 12/11/2003
  • Issued: 03/08/2005
  • Est. Priority Date: 08/26/2002
  • Status: Expired due to Fees
First Claim
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1. A method of forming a memory cell, comprising:

  • forming rails of semiconductor material on a substrate;

    doping a first portion of said rails;

    forming a dielectric on said first portion of at least every other one of said rails;

    forming a plate electrode on said first portion of adjacent pairs of said rails;

    forming an FET horizontally along a second portion of said rails adjacent to said first portion which contain the FET source and drain, said FET having a gate electrode disposed on all exposed sides of a part of said second portion of said rails.

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