Thin-film transistor used as heating element for microreaction chamber

• US 6,864,140 B2
• Filed: 10/18/2002
• Issued: 03/08/2005
• Est. Priority Date: 12/20/2001
• Status: Expired due to Term

• Current Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Inventors: Bryant, Frank R.
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): Lee, Calvin
• Application Number:
  US10/273,690
• Publication Number:
  US 20030119289A1
• Time in Patent Office: 872 Days
• Field of Search: 347 9- 24, 438/21, 438/54, 438/282, 438/292, 438/351, 438381-385, 257/510, 257/519, 257/777
• US Class Current: 438/282
• CPC Class Codes: B01J 19/0093 Microreactors, e.g. miniaturised or microfabricated reactors laboratory containers with capillary fluid transport in microfabricated channels or chambers B01L3/5027
• CPC Class Codes: B01J 2219/00783 Laminate assemblies, i.e. the reactor comprising a stack of plates
• CPC Class Codes: B01J 2219/00828 Silicon wafers or plates
• CPC Class Codes: B01J 2219/00853 Employing electrode arrangements
• CPC Class Codes: B01J 2219/00873 Heat exchange
• CPC Class Codes: B01L 3/5027 by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip B01L3/5023 takes precedence; micromixers B01F33/30; microreactors for synthesis B01J19/0093; microcapillary devices in general B81B1/00
• CPC Class Codes: B41J 2/14129 Layer structure
• CPC Class Codes: F24V 99/00 Subject matter not provided for in other main groups of this subclass
• CPC Class Codes: G01N 2035/00376 Conductive heating, e.g. heated plates
• CPC Class Codes: G01N 25/4826 concerning the heating or cooling arrangements heating apparatus for chemical or physical laboratory apparatus in general B01L7/00
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78624 the source and the drain regions being asymmetrical
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H05B 2203/013 Heaters using resistive films or coatings
• CPC Class Codes: H05B 2203/017 Manufacturing methods or apparatus for heaters
• CPC Class Codes: H05B 3/26 heating conductor mounted on insulating base for transparent areas H05B3/84, H05B3/86

Abstract

The thin film transistor formed of polycrystalline silicon is positioned adjacent a heat reaction chamber. The gate electrode for the transistor is formed within a silicon substrate and a gate dielectric is positioned over the gate electrode. A pass transistor is coupled to the gate electrode, the pass transistor having a source/drain region in the same semiconductor substrate and positioned adjacent to the gate electrode of the thin film heating transistor. When the pass transistor is enabled, a voltage is applied to the gate electrode which causes the current to flow from the drain to the source of the thin film transistor. The current flow passes through a highly resistive region which generates heat that is transmitted to the heat reaction chamber.

Claims

1. A method, comprising:

introducing a fluid into a microreaction chamber formed on a semiconductor substrate;

heating the fluid in the chamber to a selected temperature, the heating step being performed by passing a current through a resistive channel region between a source and drain of a transistor formed adjacent to the chamber, and causing, thereby, the channel region to increase in temperature and to heat the fluid in the adjacent chamber by conduction; and

regulating the degree of heat produced in the channel region by adjusting a voltage level on a gate terminal of the transistor.

2. The method of claim 1 further comprising terminating the heating step by coupling the gate terminal to a circuit ground.

3. A method of heating a region of a semiconductor substrate, comprising:

applying a voltage across a source and drain of a transistor;

applying a voltage to a gate terminal of the transistor;

generating a selected amount of heat energy in a channel region of the transistor by regulating the voltage applied to the gate terminal of the transistor; and

introducing a fluid into a microreaction chamber formed on the semiconductor substrate.

4. A method of heating a region of a semiconductor substrate, comprising:

applying a voltage across a source and drain of a transistor;

applying a voltage to a gate terminal of the transistor; and

generating a selected amount of heat energy in a channel region of the transistor by regulating the voltage applied to the gate terminal of the transistor at a high voltage level, and selecting the degree of heat energy produced by regulating a time period during which the voltage is applied to the gate terminal.

5. A method, comprising:

applying a voltage across a source and drain of a transistor, a channel region of the transistor including a resistive region for generating heat;

applying a voltage to a gate electrode of the transistor, the gate electrode being positioned underneath the channel region in a semiconductor substrate; and

selecting a degree of heat energy produced in the resistive region of the transistor by regulating the voltage applied to the gate terminal of the transistor.

6. A method, comprising:

introducing a fluid into a microreaction chamber formed on a semiconductor substrate; and

heating the fluid in the chamber by inducing a current to, and generating heat in, a channel region of a transistor, the channel region located adjacent to the chamber.

7. A method, comprising:

introducing a fluid into a microreaction chamber formed on semiconductor substrate;

heating the fluid in the chamber to a selected temperature, the heating step being performed by passing a current through a resistive channel region between a source and drain of a transistor formed adjacent to the chamber, and causing, thereby, the channel region to increase in temperature and to heat the fluid in the adjacent chamber by conduction; and

terminating the heating step by coupling a gate terminal of the transistor to a circuit ground.

8. The method of claim 7, comprising regulating the degree of heat produced in the channel region by adjusting a voltage level on the gate terminal of the transistor.

9. The method of claim 7, comprising regulating the degree of heat produced in the channel region by regulating time period during which a voltage is applied to the gate terminal of the transistor.

10. A method, comprising:

applying a voltage across a source and drain of a transistor;

applying a voltage to a gate terminal of the transistor; and

regulating the voltage applied to the gate terminal of the transistor to control an amount of heat energy produced in a polycrystalline channel region of the transistor.

11. The method of claim 10 wherein the polycrystalline channel region of the transistor is formed over the gate terminal on a semiconductor substrate.

12. A method, comprising:

applying a voltage across a source and drain of a transistor;

transmitting heat, produced in a channel region of the transistor, from the transistor to an adjacent structure; and

controlling the amount of heat energy transmitted to the adjacent structure by regulating a voltage applied to the gate terminal of the transistor.

13. The method of claim 12 wherein the adjacent structure is a micromechanical device.

14. The method of claim 12 wherein the adjacent structure is a microfluidic device.