Operational amplifier arrangement including a quiescent current control circuit

• US 6,867,647 B2
• Filed: 05/03/2002
• Issued: 03/15/2005
• Est. Priority Date: 05/18/2001
• Status: Expired due to Term

• Current Assignee: RPX Corporation
• Original Assignee: Alcatel SA (Nokia Corporation)
• Inventors: Wouters, Patrick August Maria
• Primary Examiner(s): Mottola, Steven J.
• Application Number:
  US10/137,421
• Publication Number:
  US 20020171478A1
• Time in Patent Office: 1,047 Days
• Field of Search: 330/9, 330/69, 330/252, 330/255, 330/258, 330/259, 330/261
• US Class Current: 330/69
• CPC Class Codes: H03F 1/308 using MOSFET
• CPC Class Codes: H03F 2203/45138 Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit

Abstract

An operational amplifier arrangement (OAA) includes a differential output stage (OS), input terminals of which are coupled to respective output terminals of a preceding stage (A2, A3), said operational amplifier arrangement (OAA) further includes a quiescent current control circuit (QCCC) coupled between said output stage (OS) and said preceding stage (A2, A3) and adapted to control the quiescent current of said differential output stage (OS) by commonly and simultaneously tuning respective input offset voltages (VoffA2, VoffA3) of said preceding stage (A2, A3), is characterised in that said quiescent current control circuit (QCCC) is adapted to digitally and off-line tune said input offset voltages of said preceding stage.

Claims

1. An operational amplifier arrangement comprising:

a differential output stage having input terminals coupled to respective output terminals of a preceding stage, said operational amplifier arrangement further including;

a quiescent current control circuit coupled to respective output terminals of said output stage and said preceding stage, said quiescent current control circuit controlling the quiescent current of said differential output stage by commonly and simultaneously tuning respective input offset voltages of said preceding stage,

wherein said quiescent current control circuit digitally and off-line tunes said respective input offset voltages of said preceding stage, said quiescent current control circuit including;

a digital control module adapted to control the common tuning of said input offset voltages, based on at least one signal received from a current sense and comparison module included in said quiescent current control circuit and coupled between said output stage and said digital control module,

whereby said current sense and comparison module is adapted to measure the output currents in two series branches of said output stage, to compare them individually with a predetermined reference current, and to generate said at least one signal to said digital control module indicative of the result of said comparison.

2. The operational amplifier arrangement according to claim 1, wherein said quiescent current control circuit is further adapted to differentially control said output currents in said two series branches of said output stage.

3. The operational amplifier arrangement according to claim 2, wherein said digital control module is further adapted to control the differential tuning of said input offset voltages of said preceding stage.

4. The operational amplifier arrangement according to claim 2, wherein said quiescent current control circuit is further adapted to compare said output currents in said two series branches of said output stage with each other and is adapted to provide an output signal to said digital control module indicative of whether said output currents are equal.

5. The operational amplifier arrangement according to claim 1, wherein said digital control module is adapted to generate a quiescent current control sequence starting from a starting condition.

6. The operational amplifier arrangement according to claim 5, wherein said digital control module is adapted to set said starting condition by controlling said input offset voltages to be sufficiently high such that the output currents in said two series branches of said output stage are lower than a predetermined lower limit value.

7. The operational amplifier arrangement according to claim 6, wherein said digital control module is further adapted to generate a first control cycle upon reaching said starting condition, whereby during said first control cycle said digital control module is further adapted to commonly control the decrease of said input offset voltages of said preceding stage, and to send a control signal to said current sensing and control module, whereby said current sense and control module is further adapted to, upon receipt of said control signal, compare said output currents in said series output branches with said predetermined value, said digital control module further being adapted to end said first control cycle upon receiving at least one output signal of said current sense and comparison module indicative of the fact that both output currents are higher than said predetermined reference current.

8. The operational amplifier arrangement according to claim 7, wherein said digital, control module is further adapted to generate a second control cycle upon reaching the end of said first control cycle, whereby during said second control cycle said digital control module is further adapted to control the differential tuning of said input offset voltages of said preceding stage and to send a control signal to said current sense and comparison module, whereby said current sense and control module is further adapted to, upon receipt of said control signal, mutually compare said output currents in said series output branches, said digital control module further being adapted to end said second control cycle ending upon receiving at least one output signal of said current sense and comparison module indicative of the fact that said output currents are equal.

9. The operational amplifier arrangement according to claim 8, wherein said digital control module is further adapted to generate a third control cycle upon reaching the end of said second control cycle, whereby during said third control cycle said digital control module is further adapted to commonly control the increase of said input offset voltages of said preceding stage and to send a control signal to said current sensing and control module whereby said current sense and control module is further adapted to, upon receipt of said control signal, compare said output currents in said series output branches with said predetermined value, said digital control module further being adapted to end said third control cycle upon receiving at least one output signal of said current sense and comparison module indicative of the fact that both output currents are lower than said predetermined reference current.

11. The operational amplifier arrangement according to claim 1, wherein said quiescent current control circuit includes:

a digital control module adapted to control the common tuning of said input offset voltages; and

a current sense and comparison module, for transmitting said at least one signal to said digital control module, said current sense and comparison module included in said quiescent current control circuit and coupled between said output stage and said digital control module,

whereby said current sense and comparison module is adapted to measure the output currents in two series branches of said output stage, to compare them individually with a predetermined reference current, and to generate said at least one signal to said digital control module indicative of the result of said comparison.

12. The operational amplifier arrangement according to claim 11, wherein said quiescent current control circuit is further adapted to differentially control said output currents in said two series branches of said output stage.

13. The operational amplifier arrangement according to claim 12, wherein said digital control module is further adapted to control the differential tuning of said input offset voltages of said preceding stage.

14. The operational amplifier arrangement according to claim 12, wherein said quiescent current control circuit is further adapted to compare said output currents in said two series branches of said output stage with each other and is adapted to provide an output signal to said digital control module indicative of whether said output currents are equal.

10. An operational amplifier arrangement comprising:

an amplifier stage comprising a first and second operational amplifiers;

a differential output stage having input terminals coupled to respective output terminals of said amplifier stage;

a quiescent current control circuit coupled to said amplifier stage and to respective output terminals of said output stage, said quiescent current control circuit controlling the quiescent current of said differential output stage by individually tuning input offset voltages of said first and second operational amplifiers,

wherein said quiescent current control circuit digitally and off-line tunes said input offset voltages of said first and second operational amplifiers.

15. The operational amplifier arrangement according to claim 10, wherein said digital control module is adapted to generate a quiescent current control sequence starting from a starting condition.

16. The operational amplifier arrangement according to claim 15, wherein said digital control module is adapted to set said starting condition by controlling said input offset voltages to be sufficiently high such that the output currents in said two series branches of said output stage are lower than a predetermined lower limit value.

17. The operational amplifier arrangement according to claim 16, wherein said digital control module is further adapted to generate a first control cycle upon reaching said starting condition, whereby during said first control cycle said digital control module is further adapted to commonly control the decrease of said input offset voltages of said preceding stage, and to send a control signal to said current sensing and control module, whereby said current sense and control module is further adapted to, upon receipt of said control signal, compare said output currents in said series output branches with said predetermined value, said digital control module further being adapted to end said first control cycle upon receiving at least one output signal of said current sense and comparison module indicative of the fact that both output currents are higher than said predetermined reference current.

18. The operational amplifier arrangement according to claim 17, wherein said digital control module is further adapted to generate a second control cycle upon reaching the end of said first control cycle, whereby during said second control cycle said digital control module is further adapted to control the differential tuning of said input offset voltages of said preceding stage and to send a control signal to said current sense and comparison module, whereby said current sense and control module is further adapted to, upon receipt of said control signal, mutually compare said output currents in said series output branches, said digital control module further being adapted to end said second control cycle ending upon receiving at least one output signal of said current sense and comparison module indicative of the fact that said output currents are equal.

19. The operational amplifier arrangement according to claim 18, wherein said digital control module is further adapted to generate a third control cycle upon reaching the end of said second control cycle, whereby during said third control cycle said digital control module is further adapted to commonly control the increase of said input offset voltages of said preceding stage and to send a control signal to said current sensing and control module, whereby said current sense and control module is further adapted to, upon receipt of said control signal, compare said output currents in said series output branches with said predetermined value, said digital control module further being adapted to end said third control cycle upon receiving at least one output signal of said current sense and comparison module indicative of the fact that both output currents are lower than said predetermined reference current.