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Semiconductor memory device, and method of controlling the same

  • US 6,868,026 B2
  • Filed: 02/13/2003
  • Issued: 03/15/2005
  • Est. Priority Date: 11/09/1999
  • Status: Expired due to Term
First Claim
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1. A semiconductor memory device comprising:

  • a self-refresh control circuit for automatically refreshing memory cells at a predetermined cycle; and

    an internal voltage generator for generating an internal voltage to be supplied to a predetermined internal circuit, upon receipt of a power supply voltage from an exterior, and wherein said self-refresh control circuit is inactivated in order to disable a refresh operation, and supply capacity of said internal voltage in said internal voltage generator is lowered when a control signal is received from the exterior, thereby entering the device into a low power consumption mode which does not execute the refresh operation.

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