Method of and apparatus for driving a dual gated MOSFET
First Claim
1. A circuit for driving a dual-gated MOSFET, said dual-gated MOSFET being switchable between conduction and blocking modes, said dual-gated MOSFET having a shielding gate, a switching gate, a gate-to-drain overlap region, and a drain-to-source resistance when the MOSFET is in the conduction mode, said circuit comprising:
- means for generating a first voltage signal for driving said shielding gate, said first voltage signal having a first voltage level for charging the gate-to-drain overlap region and a fourth voltage level for reducing the drain-to-source resistance when the MOSFET is in the conduction mode;
means for generating a second voltage signal for driving the switching gate, said second voltage signal being switchable between a low and a high voltage level; and
control means for controlling each of said means for generating to thereby switch the MOSFET between the conduction and blocking modes.
7 Assignments
0 Petitions
Accused Products
Abstract
A method of driving a dual-gated MOSFET having a Miller capacitance between the MOSFET gate and drain includes preparing the MOSFET to switch from a blocking mode to a conduction mode by applying to the MOSFET shielding gate a first voltage signal having a first voltage level. The first voltage level is selected to charge the Miller capacitance and thereby reduce switching losses. A second voltage signal is applied to the switching gate to switch the MOSFET from the blocking to the conduction mode. The first voltage signal is then changed to a level selected to reduce the conduction mode drain-to-source resistance and thereby reduce conduction losses. The first voltage signal is returned to the first voltage level to prepare the MOSFET for being switched from the conduction mode to the blocking mode.
-
Citations
7 Claims
-
1. A circuit for driving a dual-gated MOSFET, said dual-gated MOSFET being switchable between conduction and blocking modes, said dual-gated MOSFET having a shielding gate, a switching gate, a gate-to-drain overlap region, and a drain-to-source resistance when the MOSFET is in the conduction mode, said circuit comprising:
-
means for generating a first voltage signal for driving said shielding gate, said first voltage signal having a first voltage level for charging the gate-to-drain overlap region and a fourth voltage level for reducing the drain-to-source resistance when the MOSFET is in the conduction mode;
means for generating a second voltage signal for driving the switching gate, said second voltage signal being switchable between a low and a high voltage level; and
control means for controlling each of said means for generating to thereby switch the MOSFET between the conduction and blocking modes. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
Specification