Integrated transformer

• US 6,870,456 B2
• Filed: 05/11/2001
• Issued: 03/22/2005
• Est. Priority Date: 11/23/1999
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Gardner, Donald S.
• Primary Examiner(s): Nguyen, Tuyen T.
• Application Number:
  US09/853,370
• Publication Number:
  US 20020008605A1
• Time in Patent Office: 1,411 Days
• Field of Search: 336/65, 336/83, 336/199, 336/200, 336206-208, 336/232, 336/233, 336/223, 296/021, 257/531
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01F 2017/0046 with a conductive path having a bridge
• CPC Class Codes: H01F 2017/008 Electric or magnetic shielding of printed inductances
• CPC Class Codes: H01F 41/042 by thin film techniques
• CPC Class Codes: H01F 41/046 structurally combined with ferromagnetic material
• CPC Class Codes: H01L 23/522 including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A transformer comprises a substrate comprising a semiconductor material, a first conductor over the substrate, a second conductor over the substrate, and a magnetic layer over the substrate. The first conductor defines a generally spiral-shaped signal path having at least one turn. The second conductor defines a generally spiral-shaped signal path having at least one turn.

Claims

1. A transformer comprising:

a substrate comprising a semiconductor material;

a first conductor over the substrate, the first conductor defining a generally spiral-shaped signal path having at least one turn;

a second conductor over the substrate, the second conductor defining a generally spiral-shaped signal path having at least one turn; and

a first magnetic layer between the substrate and the first conductor, and a second magnetic layer between the first conductor and the second conductor, wherein the first magnetic layer is coupled to the second magnetic layer.

2. The transformer of claim 1, wherein the magnetic layers comprise cobalt.

3. The transformer of claim 1, wherein the magnetic layers comprise an amorphous alloy comprising cobalt.

4. The transformer of claim 1, wherein the magnetic layers comprise an amorphous alloy comprising cobalt and zirconium.

5. The transformer of claim 1, wherein the magnetic layers comprise an amorphous alloy comprising cobalt;

zirconium; and

tantalum, niobium, or a rare earth element.

6. The transformer of claim 1, wherein the second conductor lies over the first conductor.

7. The transformer of claim 1, wherein the first and second conductors are positioned such that at least a portion of one or more turns of the first conductor are each positioned adjacent to an inner side of at least a portion of one turn of the second conductor and such that at least a portion of one or more turns of the second conductor are each positioned adjacent to an inner side of at least a portion of one turn of the first conductor.

8. The transformer of claim 7, wherein the first and second conductors each lie over the first magnetic layer.

9. A transformer comprising:

a substrate comprising a semiconductor material;

a first conductor over the substrate, the first conductor defining a generally spiral-shaped signal path having at least one turn;

a second conductor over the substrate and defining a generally spiral-shaped signal path having at least one turn; and

a first magnetic layer disposed between all of the spiral-shaped signal path of the first conductor and all of the spiral-shaped signal path of the second conductor; and

a second magnetic layer disposed between the first conductor and the substrate, wherein the second magnetic layer is coupled to the first magnetic layer.

10. A method comprising:

forming a first conductor over a substrate comprising a semiconductor material, wherein the forming the first conductor comprises forming the first conductor such that the first conductor defines a generally spiral-shaped signal path having at least one turn;

forming a second conductor over the substrate such that the second conductor defines a generally spiral-shaped signal path having at least one turn; and

forming a first magnetic layer between the substrate and the first conductor, and a second magnetic layer between the first conductor and the second conductor, wherein the first magnetic layer is coupled to the second magnetic layer.

11. The method of claim 10, wherein the forming the magnetic layers comprises forming a magnetic layer comprising cobalt.

12. The method of claim 10, wherein the forming the magnetic layers comprises forming a magnetic layer comprising an amorphous alloy comprising cobalt.

13. The method of claim 10, wherein the forming the magnetic layers comprises forming a magnetic layer comprising an amorphous alloy comprising cobalt and zirconium.

14. The method of claim 10, wherein the forming the magnetic layers comprises forming a magnetic layer comprising an amorphous alloy comprising cobalt;

zirconium; and

tantalum, niobium, or a rare earth element.

15. The method of claim 10, wherein the forming the second conductor comprises forming the second conductor over the first conductor.

16. The method of claim 10, wherein the forming the first conductor and the forming the second conductor comprise forming the first and second conductors such that at least a portion of one or more turns of the first conductor are each positioned adjacent to an inner side of at least a portion of one turn of the second conductor and such that at least a portion of one or more turns of the second conductor are each positioned adjacent to an inner side of at least a portion of one turn of the first conductor.