Finite-length equalization over multi-input multi-output channels

• US 6,870,882 B1
• Filed: 09/28/2000
• Issued: 03/22/2005
• Est. Priority Date: 10/08/1999
• Status: Expired due to Fees

• Current Assignee: AT&T Intellectual Property II LP (AT&T, Inc.), Regents of the University of California (University of California)
• Original Assignee: AT&T Corporation (AT&T, Inc.)
• Inventors: Al-Dhahir, Naofal, Sayed, Ali H
• Primary Examiner(s): Ghayour, Mohammed
• Assistant Examiner(s): Nguyen, Dung X.
• Application Number:
  US09/671,638
• Time in Patent Office: 1,636 Days
• Field of Search: 375/229, 375/230, 375/232, 375/267, 375/347, 375/350, 375/233
• US Class Current: 375/233
• CPC Class Codes: H04B 1/7103 the interference being multiple access interference
• CPC Class Codes: H04B 1/71075 Parallel interference cancellation
• CPC Class Codes: H04B 1/712 Weighting of fingers for combining, e.g. amplitude control or phase rotation using an inner loop
• CPC Class Codes: H04B 7/04 using two or more spaced independent antennas
• CPC Class Codes: H04L 2025/03375 Passband transmission
• CPC Class Codes: H04L 2025/03426 transmission using multiple-input and multiple-output channels
• CPC Class Codes: H04L 2025/0349 as a feedback filter
• CPC Class Codes: H04L 2025/03605 Block algorithms
• CPC Class Codes: H04L 25/03057 with a recursive structure H04L25/03031 takes precedence

Abstract

A MIMO Decision Feedback Equalizer improves operation of a receiver by cancelling the spatio-temporal interference effects caused by the MIMO channel memory with a set of FIR filters in both the feedforward and the feedback MIMO filters. The coefficients of these FIR filters can be fashioned to provide a variety of controls by the designer.

Claims

1. A receiver responsive to an n_o plurality of entry points comprising:

a feedforward filter structure having an n_o×

n_j plurality of FIR filters, each responsive to a signal that is derived from one of said n_o entry points and each developing an output signal that contributes to one of n_j feedforward filter structure outputs;

a feedback filter structure developing n_j feedback signals, the structure having an n_j×

n_i plurality of FIR filters, each being responsive to one of n_j output signals;

a subtractor structure that develops n_j signals from signals of said n_j feedforward filter structure output and said n_j feedback signals;

decision logic responsive to said n_j outputs developed by said subtractor structure, for developing said n_j output signals; and

a sampling circuit interposed between said n_o plurality of entry points and said feedforward filter structure that samples received signal at rate

$T_a=\frac{T}{I},$

where I is an integer and T is symbol rate of a transmitter whose signals said receiver receives.

2. The receiver of claim 1, where I>

1.

3. The receiver of claim 1 where said plurality of FIR filters in said feedforward structure is expressed by matrix W, and W is computed by W*_opt={tilde over (B)}*_optR_xyR_yy⁻

1, W*_opt={overscore (B)}*_optR_xxH*(HR_xxH*+R_nn)<sup>−

1</sup>, or W*_opt={tilde over (B)}*_opt(R_xx<sup>−

1</sup>+H*R_nn<sup>−

1</sup>H)<sup>−

1</sup>H*R_nn<sup>−

1</sup>, where R_xx is an autocorrelation matrix of a block of signals transmitted by a plurality of transmitting antennas to said n_o antennas via a channel having a transfer characteristic H, R_nn is an autocorrelation matrix of noise received by said plurality of n_o antennas during said block of signals transmitted by said transmitting antennas, R_xy=R_xxH*, R_yy=HR_xxH*+R_nn, and {tilde over (B)}*_opt is a sub-matrix of matrix B*_opt, where B_opt=argmin_Btrace(R_ee) subject to a selected constraint, R_ee being the error autocorrelation function.

4. The receiver of claim 3 where said plurality of FIR filters in said feedback structure is expressed by matrix [I_nj0_nq×

n_jNb]−

B*.

5. The receiver of claim 3 wherein said plurality of FIR filters in said feedforward filter structure and in said feedforward filter structure are subjected to designer constraints relative to any one or a number of members of the following set:

transmission channel memory, size of said block, effective memory of the combination consisting of said transmission channel;

n_i, n_o, autocorrelation matrix R_xx, autocorrelation matrix R_nn, value of factor I in said sampling circuit, and decision delay.

6. The receiver of claim 3 where said matrix W is expressible by W≡

[W₀W₁ . . . W<sub>Nf−

1</sub>]^t, where matrix W_q is a matrix that specifies q^th tap coefficients of said FIR filters.

7. A receiver responsive to an n_o plurality of entry points comprising:

a feedforward filter structure having an n_o×

n_j plurality of FIR filters, each responsive to a signal that is derived from one of said n_o entry points and each developing an output signal that contributes to one of n_j feedforward filter structure outputs;

a feedback filter structure developing n_j feedback signals, the structure having an n_j×

n_i plurality of FIR filters, each being responsive to one of n_j output signals;

a subtractor structure that develops n_j signals from signals of said n_j feedforward filter structure outputs and said n_j feedback signals;

decision logic responsive to said n_j outputs developed by said subtractor structure, for developing said n_j output signals; and

processor coupled to signals applied to said feedforward filter structure, for computing coefficients of said FIR filters included in said feedforward filter structure and of said FIR filters included in said feedback filter structure;

where said coefficients are computed once every time interval that is related to rapidity of change in characteristics of transmission medium preceding said entry points.

8. The receiver of claims 7 where said processor installs computed coefficients of said FIR filters in said FIR filters following each computation.

9. A receiver responsive to an n_o plurality of entry points comprising:

a feedforward filter structure having an n_o×

n_j plurality of FIR filters, each responsive to a signal that is derived from one of said n_o entry points and each developing an output signal that contributes to one of n_j feedforward filter structure outputs;

a feedback filter structure developing n_j feedback signals, the structure having an n_i×

n_j plurality of FIR filters, each being responsive to one of n_j output signals;

a subtractor structure that develops n_j signals from signals of said n_j feedforward filter structure outputs and said n_j feedback signals; and

decision logic responsive to said n_j outputs developed by said subtractor structure, for developing said n_j output signals;

where coefficients of the FIR filters in said feedforward filter are set to results in an effective transmission channel B with memory N_b, where N_b≦

v, where B is optimized so that B_opt=argmin_Btrace(R_ee) subject to a selected constraint;

R_ee being the error autocorrelation function, the feedback filter is modeled by [I_nj0<sub>nj×

njNb</sub>]−

B*, where n_I is the number of outputs in the feedforward filter, as well as the number of outputs in the feedback filter, and the feedforward filter is modeled by W, where W*_opt={overscore (B)}*_optR_xyR_yy<sup>−

1</sup>, R_xy is the cross correlation between transmitted signals and signals received by said receiver, and R_yy is the autocorrelation of the received signals.

10. The receiver of claim 9 where said selected constraint is {overscore (B)}*Φ

=C*, where

$\mathrm{\Phi <br><br>}\equiv <br><br>\left[\begin{array}{cccc}{I}_{n_i}& 0& \mathrm{\cdots <br><br>}& 0\\ 0& I_{n_i}& \mathrm{⋮<br><br>}& \mathrm{⋮<br><br>}\\ \mathrm{⋮<br><br>}& 0& \mathrm{⋰<br><br>}& I_{n_i}\\ 0& \mathrm{\cdots <br><br>}& \mathrm{\cdots <br><br>}& 0\end{array}\right]$

and C*=[0<sub>ni×

njΔ</sub>

I_nq].

11. The receiver of claim 9 where said selected constraint is {overscore (B)}*Φ

=C*, where

$\mathrm{\Phi <br><br>}\equiv <br><br>\left[\begin{array}{cccc}{I}_{n_i}& 0& \mathrm{\cdots <br><br>}& 0\\ 0& I_{n_i}& \mathrm{⋮<br><br>}& \mathrm{⋮<br><br>}\\ \mathrm{⋮<br><br>}& 0& \mathrm{⋰<br><br>}& I_{n_i}\\ 0& \mathrm{\cdots <br><br>}& \mathrm{\cdots <br><br>}& 0\end{array}\right]$

and C*=[0<sub>nj×

niΔ</sub>

B*₀], B*₀ being a monic lower-triangular matrix whose entries are optimized to minimize trace(R_ee,min).

12. The receiver of claim 9 where said selected constraint is e*_jB₀e_j=1, where e_j is a vector with value 1 in position I and values 0 elsewhere, and where B*₀ being a monic lower-triangular matrix whose entries are optimized to minimize trace(R_ee,min).