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Multi-mode bias circuit for power amplifiers

  • US 6,873,211 B1
  • Filed: 09/10/2003
  • Issued: 03/29/2005
  • Est. Priority Date: 09/10/2003
  • Status: Active Grant
First Claim
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1. A circuit arrangement comprising:

  • a multi-mode bias circuit comprising a control voltage input, a mode control input for selecting between a linear mode and a saturation mode, and a bias output;

    an amplifier comprising a bias input connected to said bias output of said multi-mode bias circuit, said amplifier further comprising an RF input and an RF output;

    said multi-mode bias circuit causing an RF output power at said RF output to be proportional to an RF input power at said RF input when said mode control input selects said linear mode;

    said multi-mode bias circuit causing an RF output power at said RF output to be determined by said control voltage input when said mode control input selects said saturation mode.

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