Post thermal treatment methods of forming high dielectric layers in integrated circuit devices

• US 6,875,678 B2
• Filed: 08/29/2003
• Issued: 04/05/2005
• Est. Priority Date: 09/10/2002
• Status: Active Grant

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Jong-ho, Jung, Hyung-suk, Lee, Nae-in, Kim, Yun-seok
• Primary Examiner(s): SARKAR, ASOK K
• Application Number:
  US10/650,415
• Publication Number:
  US 20040048491A1
• Time in Patent Office: 585 Days
• Field of Search: 438/183, 438/197, 438/199, 438/216, 438/217, 438229-231, 438/240, 438/257, 438261-263, 438/266, 438/287, 438/584, 438/591, 438/592, 438/761, 438/770, 438/785, 438/787
• US Class Current: 438/591
• CPC Class Codes: H01L 21/02178 the material containing aluminium, e.g. Al2O3
• CPC Class Codes: H01L 21/02181 the material containing hafnium, e.g. HfO2
• CPC Class Codes: H01L 21/02189 the material containing zirconium, e.g. ZrO2
• CPC Class Codes: H01L 21/02192 the material containing at least one rare earth metal element, e.g. oxides of lanthanides, scandium or yttrium
• CPC Class Codes: H01L 21/022 the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides adhesion layers or buffer layers H01L21/02304, H01L21/02362
• CPC Class Codes: H01L 21/02329 introduction of nitrogen
• CPC Class Codes: H01L 21/02337 treatment by exposure to a gas or vapour
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 21/28202 in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
• CPC Class Codes: H01L 21/3143 composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
• CPC Class Codes: H01L 21/3144 on silicon
• CPC Class Codes: H01L 21/31604 Deposition from a gas or vapour H01L21/31691, H01L21/31695 take precedence
• CPC Class Codes: H01L 21/31641 Deposition of Zirconium oxides, e.g. ZrO2
• CPC Class Codes: H01L 21/31645 Deposition of Hafnium oxides, e.g. HfO2
• CPC Class Codes: H01L 21/3185 of siliconnitrides
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/517 the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate H01L29/518 takes precedence
• CPC Class Codes: H01L 29/518 the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Abstract

High dielectric layers formed from layers of hafnium oxide, zirconium oxide, aluminum oxide, yttrium oxide, and/or other metal oxides and silicates disposed on silicon substrates may be nitrided and post thermally treated by oxidation, annealing, or a combination of oxidation and annealing to form high dielectric layers having superior mobility and interfacial characteristics.

Claims

1. A method for treating a high dielectric layer of a semiconductor device, comprising:

nitriding a high dielectric layer on a silicon substrate, wherein said high dielectric layer comprises a multi-layered nano laminate formed by forming a hafnium oxide layer or a zirconium oxide layer directly on the substrate using atomic layer deposition and then forming a Group 3 metal oxide layer thereon using atomic layer deposition; and

post treating the high dielectric layer and silicon substrate.

2. The method of claim 1, wherein nitriding a high dielectric layer comprises nitriding said high dielectric layer using a nitriding process selected from the group consisting of a nitrogen plasma treatment process, a thermal treatment process in a nitrogen atmosphere, and a thermal treatment process comprising thermally treating the high dielectric layer after forming a nitrogen layer on the high dielectric layer.

3. The method of claim 1, wherein post treating the high dielectric layer and silicon substrate comprises post treating using a process selected from the group consisting of an oxidation process and an annealing process.

4. The method of claim 1, wherein the Group 3 metal oxide layer is selected from the group consisting of aluminum oxide and yttrium oxide.

5. The method of claims 1, further comprising depositing an additional layer over the silicon substrate, the additional layer selected from the group consisting of a hafnium silicate layer, a zirconium silicate layer, and an aluminum silicate layer.

6. A method for treating a high dielectric layer of a semiconductor device, comprising:

nitriding a silicon substrate and a high dielectric layer on said silicon substrate, said high dielectric layer comprising a multi-layered nano laminate formed by forming a hafnium oxide layer or a zirconium oxide layer directly on the substrate using atomic layer deposition and then forming a Group 3 metal oxide layer thereon using atomic layer deposition; and

then annealing the silicon substrate and high dielectric layer.

7. The method of claim 6, wherein the Group 3 metal oxide layer is selected from the group consisting of an aluminum oxide layer and a yttrium oxide layer.

8. The method of claim 6, wherein the nano laminate is formed by depositing an additional layer selected from the group consisting of a hafnium silicate layer, a zirconium silicate layer, and an aluminum silicate layer.

9. The method of claim 6, wherein said nitriding is performed using a nitriding process selected from the group consisting of a nitrogen plasma treatment process, a thermal treatment in a nitrogen atmosphere process, and a process comprising forming a nitrogen layer over the high dielectric layer and thermally treating the formed nitrogen layer.

10. The method of claim 6, wherein said annealing the silicon substrate and high dielectric layer comprises annealing the silicon substrate and high dielectric layer in an atmosphere selected from the group consisting of an inert gas atmosphere, a heavy hydrogen atmosphere, a hydrogen atmosphere, a mixed nitrogen and hydrogen gas atmosphere, and a vacuum atmosphere.

11. The method of claim 6, wherein said annealing the silicon substrate and high dielectric layer comprises annealing the silicon substrate and high dielectric layer at a temperature at or between about 750°

C. and 1100°

C.

12. A method for treating a high dielectric layer of a semiconductor device, comprising:

nitriding a silicon substrate and a high dielectric layer on said silicon substrate, said high dielectric layer comprising a multi-layered nano laminate formed by forming a hafnium oxide layer or a zirconium oxide layer directly on the substrate using atomic layer deposition, and then forming a Group 3 metal oxide layer thereon using atomic layer deposition; and

then oxidizing the silicon substrate and high dielectric layer.

13. The method of claim 12, wherein the Group 3 metal oxide layer is selected from the group consisting of an aluminum oxide layer and a yttrium oxide layer.

14. The method of claim 12, wherein the multi-layered nano laminate is formed by forming an additional layer comprising a hafnium silicate layer, a zirconium silicate layer, or an aluminum silicate layer.

15. The method of claim 12, wherein said nitriding is performed using a nitriding process selected from the group consisting of a nitrogen plasma treatment process, a thermal treatment in a nitrogen atmosphere process, and a process comprising forming a nitrogen layer over the high dielectric layer and thermally treating the formed nitrogen layer.

16. The method of claim 12, wherein said oxidizing the silicon substrate and high dielectric layer comprises wet oxidizing the silicon substrate and high dielectric layer.

17. The method of claim 12, wherein said oxidizing the silicon substrate and high dielectric layer comprises dry oxidizing the silicon substrate and high dielectric layer.

18. The method of claim 12, wherein said oxidizing the silicon substrate and high dielectric layer comprises oxidizing the silicon substrate and high dielectric layer with an oxidizing agent selected from the group consisting of ozone, radical oxygen, and oxygen plasma.

19. A method for treating a high dielectric layer of a semiconductor device, comprising:

nitriding a silicon substrate and a high dielectric layer on said silicon substrate, said high dielectric layer comprising a multi-layered nano laminate formed by forming a hafnium oxide layer or a zirconium oxide layer directly on the substrate using atomic layer deposition, and then forming a Group 3 metal oxide layer thereon using atomic layer deposition; and

then

oxidizing the silicon substrate and high dielectric layer; and

annealing the nitrided and oxidized silicon substrate and high dielectric layer.

20. The method of claim 19, wherein the Group 3 metal oxide layer is selected from the group consisting of an aluminum oxide layer and a yttrium oxide layer.

21. The method of claim 19, wherein the multi-layered nano laminate is formed by depositing additional layer comprising a hafnium silicate layer, a zirconium silicate layer, or an aluminum silicate layer.

22. The method of claim 19, wherein said nitriding is performed using a nitriding process selected from the group consisting of a nitrogen plasma treatment process, a thermal treatment in a nitrogen atmosphere process, and a process comprising forming a nitrogen layer over the high dielectric layer and thermally treating the formed nitrogen layer.

23. The method of claim 19, wherein said oxidizing the silicon substrate and high dielectric layer comprises wet oxidizing the silicon substrate and high dielectric layer.

24. The method of claim 19, wherein said oxidizing the silicon substrate and high dielectric layer comprises dry oxidizing the silicon substrate and high dielectric layer.

25. The method of claim 19, wherein said oxidizing the silicon substrate and high dielectric layer comprises oxidizing the silicon substrate and high dielectric layer with an oxidizing agent selected from the group consisting of ozone, radical oxygen, and oxygen plasma.

26. The method of claim 19, wherein said annealing the nitrided and oxidized silicon substrate and high dielectric layer comprises annealing the nitrided and oxidized silicon substrate and high dielectric layer in an atmosphere selected from the group consisting of an inert gas atmosphere, a heavy hydrogen atmosphere, a hydrogen atmosphere, a mixed nitrogen and hydrogen gas atmosphere, and a vacuum atmosphere.

27. The method of claim 19, wherein said annealing the nitrided and oxidized silicon substrate and high dielectric layer comprises annealing the nitrided and oxidized silicon substrate and high dielectric layer at a temperature at or between about 750°

C. and 1100°

C.

28. The method of claim 19, wherein said oxidizing the silicon substrate and high dielectric layer comprises oxidizing the silicon substrate and high dielectric layer at or between a temperature of about 700°

C. to about 900°

C.

29. A method for treating a multi-layered nano laminate high dielectric layer of an integrated circuit device, comprising nitriding to provide a nitride profile concentration in the high dielectric layer that is greater adjacent to a polysilicon/high dielectric layer interface than adjacent to a silicon/high dielectric layer interface, wherein the multi-layered nano laminate is formed by forming a hafnium oxide layer or a zirconium oxide layer directly on the substrate using atomic layer deposition, and then forming a Group 3 metal oxide layer thereon using atomic layer deposition.