Mount for semiconductor light emitting device
First Claim
1. A device comprising:
- a semiconductor light emitting device comprising;
an n-type layer;
a p-type layer;
an active region interposing the n-type layer and the p-type layer;
an n-contact electrically connected to the n-type layer; and
a p-contact electrically connected to the p-type layer;
wherein the n- and p-contacts are formed on a same side of the semiconductor light emitting device; and
a submount comprising;
first and second conductive regions on a first side of the submount;
third and fourth conductive regions on a second side of the submount;
a semiconductor region; and
an insulating region, wherein the n- and p-contacts of the semiconductor light emitting device are electrically and physically connected to the first and second conductive regions of the submount in a flip chip configuration.
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Accused Products
Abstract
A device includes a submount, and a semiconductor light emitting device mounted on first and second conductive regions on a first side of the submount in a flip chip architecture configuration. The submount has third and fourth conductive regions on a second side of the submount. The third and fourth conductive regions may be used to solder the submount to structure such as a board, without the use of wire bonds. The first and third conductive regions are electrically connected by a first conductive layer and the second and fourth conductive regions are electrically connected by a second conductive layer. The first and second conductive layers may be disposed on the outside of the submount or within the submount.
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Citations
25 Claims
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1. A device comprising:
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a semiconductor light emitting device comprising;
an n-type layer;
a p-type layer;
an active region interposing the n-type layer and the p-type layer;
an n-contact electrically connected to the n-type layer; and
a p-contact electrically connected to the p-type layer;
wherein the n- and p-contacts are formed on a same side of the semiconductor light emitting device; and
a submount comprising;
first and second conductive regions on a first side of the submount;
third and fourth conductive regions on a second side of the submount;
a semiconductor region; and
an insulating region, wherein the n- and p-contacts of the semiconductor light emitting device are electrically and physically connected to the first and second conductive regions of the submount in a flip chip configuration. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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Specification