Method and apparatus for analyzing electromagnetic interference

• US 6,876,210 B2
• Filed: 11/27/2001
• Issued: 04/05/2005
• Est. Priority Date: 11/27/2000
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Mizokawa, Takashi, Ohhashi, Tatsuo, Shimazaki, Kenji, Tsujikawa, Hiroyuki, Hirano, Shouzou
• Primary Examiner(s): Pert, Evan
• Assistant Examiner(s): Nguyen, Tung X.
• Application Number:
  US09/993,595
• Publication Number:
  US 20020075018A1
• Time in Patent Office: 1,225 Days
• Field of Search: 324/765, 324/750, 324/117.R, 324/117.H, 324/763, 324/769
• US Class Current: 324/762.02
• CPC Class Codes: G01R 31/002 where the device under test is an electronic circuit
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking

Abstract

A method of analyzing electromagnetic interference in which an amount of electromagnetic interference from an LSI is analyzed, wherein the method includes: an equivalent power source current information calculating step of calculating information of an equivalent power source current flowing in a power source current, from circuit information of the LSI chip; an estimating step of considering at least one of power source information of a power source for supplying a current to the LSI chip, package information of a package for the semiconductor chip, and measurement system information of a measurement system for measuring characteristics of the semiconductor chip, as analysis control information, and of estimating total information in which the analysis control information is reflected in the circuit information, as an equivalent circuit; and a total information analyzing step of performing analysis in accordance with the total information which is estimated in the estimating step.

Claims

1. A method of analyzing electromagnetic interference in which an amount of electromagnetic interference from an LSI is analyzed, wherein said method includes:

an equivalent power source current information calculating step of calculating information of an equivalent power source current flowing in a power source current, from circuit information of said LSI;

an estimating step of considering at least one of power source information of a power source for supplying a current to said LSI package information of a package for said LSI, and measurement system information of a measurement system for measuring characteristics of said semiconductor chip, as analysis control information, and of estimating total information in which said analysis control information is reflected in said circuit information, as an equivalent circuit; and

a total information analyzing step of performing analysis in accordance with said total information which is estimated in said estimating step.

2. A method of analyzing electromagnetic interference according to claim 1, wherein said estimating step is a step of calculating a total impedance by adding said analysis control information to said circuit information, and of outputting said calculated total impedance as total information to said total information analyzing step.

3. A method of analyzing electromagnetic interference according to claim 1, wherein said analysis control information includes:

said power source information of said power source for supplying a current to said LSI chip; and

at least one of said package information of said package for said semiconductor chip, and said measurement system information of said measurement system for measuring characteristics of said semiconductor chip.

4. A method of analyzing electromagnetic interference according to claim 1, wherein said analysis control information includes:

said power source information of said power source for supplying a current to said LSI chip;

said package information of said package for said semiconductor chip; and

said measurement system information of sold measurement system for measuring characteristics of said semiconductor chip.

5. A method of analyzing electromagnetic interference according to claim 1, wherein said total information analyzing step is a simulation step of performing a simulation by adding said equivalent power source current information to said total information.

6. A method of analyzing electromagnetic interference according to claim 1, wherein said total information analyzing step includes:

a step of obtaining corrected equivalent power source current information in which said equivalent power source current is corrected by reflecting said total information; and

a frequency spectrum calculating step of calculating, frequency spectrum of said corrected equivalent power source current information.

7. A method of analyzing electromagnetic interference according to claim 1, wherein said equivalent power source current information calculating step includes a frequency spectrum calculating step of calculating a frequency spectrum.

8. A method of analyzing electromagnetic interference according to claim 1, wherein said total information analyzing step is a step of obtaining a correction function for correcting said equivalent power source current information, from said total information, and of calculating sold equivalent power source current information using said correction function.

9. A method of analyzing electromagnetic interference according to any one of claims 1 to 8, wherein said equivalent power source current information calculating step includes:

a step of calculating an instantaneous current amount in consideration of;

event information which is generated at occurrence of a change of a signal, and which includes instance names of cells of said LSI chip that is on object of the occurrence, a name of the signal, an occurrence time, and transition information and said total information which is estimated in said estimating step; and

a modeling step of modeling said instantaneous current amount in accordance with a predetermined rule.

10. A method of analyzing electromagnetic interference according to claim 9, wherein said modeling step is a step of accumulating current waveforms each having a Japanese chess piece-like shape.

11. A method of analyzing electromagnetic interference according to claim 5, wherein said simulation step includes a step of synchronizing with said equivalent power source current information calculating step.

12. A method of analyzing electromagnetic interference according to claim 5, wherein said simulation step includes a step of repeatedly performing a simulation in synchronization with a timing of adding information to said equivalent power source current information.

13. A method of analyzing electromagnetic interference according to claim 5, wherein said simulation step includes a step of reading said equivalent power source current information at predetermined intervals.

14. A method of analyzing electromagnetic interference according to claim 6, wherein said frequency spectrum calculating step includes a collapsing step at collapsing said corrected equivalent power source current information at predetermined intervals.

15. A method of analyzing electromagnetic interference according to claim 14, wherein, in said collapsing step, sets of said corrected equivalent power source current information at predetermined intervals are averaged or maximized in time sequence.

16. A method of analyzing electromagnetic interference according to any one of claims 1 to 15, wherein said equivalent power source current information calculating step is a library accumulating step of calculating accumulation of library information which is equivalent power source current information of each portion of said current information that is previously calculated.

17. A method of analyzing electromagnetic interference according to claim 16, wherein said library information is a function or a table of one of input signal information and output signal information of each portion of said current information, and an output capacitance.

18. A method of analyzing electromagnetic interference according to claim 16, wherein said library information is information of a portion which is obtained by dividing said circuit information into one or more parts, i.e., a clock synchronous part which is synchronized with a clock, and a clock asynchronous part which is not synchronized with said clock.

19. A method of analyzing electromagnetic interference according to claim 18, wherein said clock synchronous part is a flip-flop, a clock buffer, or a synchronous memory.

20. A method of analyzing electromagnetic interference according to claim 16, wherein said library accumulating step includes a step of, from said circuit information, analogizing which portion of said circuit information corresponds to a library.

21. A method of analyzing electromagnetic interference according to any one of claims 1 to 15, wherein said equivalent power source current information calculating step includes a calculation method determining step of selecting one of a high speed equivalent power source current information calculating method and an accurate equivalent power source current information calculating method, based on partial circuit information of said circuit information.

22. A method of analyzing electromagnetic interference according to any one of claims 1 to 15, wherein said equivalent power source current information calculating step includes a differential power source current calculating step of, based on a difference of said circuit information with respect to equivalent power source current information which has been already analyzed, calculating power source current information of said difference only.

23. A method of analyzing electromagnetic interference according to any one of claims 1 to 15, wherein said method further includes an analysis information displaying step of displaying a result obtained in said total information analyzing step, as analysis information.

24. A method of analyzing electromagnetic interference according to any one of claims 1 to 15, wherein said method further includes an optimizing step of optimizing said circuit information so as to reduce electromagnetic interference, based on a result obtained in said total information analyzing step.

25. A method of analyzing electromagnetic interference according to claim 24, wherein said method further includes an optimized information displaying step of displaying circuit information obtained in said optimizing step, as optimized information.

26. An apparatus for analyzing electromagnetic interference in which an amount of electromagnetic interference from an LSI is analyzed, wherein said apparatus includes:

equivalent power source current information calculating means for calculating information of an equivalent power source current flowing in a power source current, from circuit information of said LSI;

estimating means for considering at least one of power source information of a power source for supplying a current to said LSI, package information of a package for said LSI, and measurement system information of a measurement system for measuring characteristics of said semiconductor chip, as analysis control information, and for estimating total information in which said analysis control information is reflected in said circuit information, as an equivalent circuit; and

total information analyzing means for peforming analysis in accordance with said total information which is estimated in said estimating means.

27. An apparatus for analyzing electromagnetic interference according to claim 26, wherein said estimating means calculates a total impedance by adding said analysis control information to said circuit information, and outputs said calculated total impedance as total information to said total information analyzing means.

28. An apparatus for analyzing electromagnetic interference according to claim 26 or 27, wherein said total information analyzing means is simulation means for performing a simulation by adding said equivalent power source current information to said total information.