Rate-controlled multi-class high-capacity packet switch
First Claim
1. A method of switching data units from a plurality of ingress modules to a plurality of egress modules through a switching fabric, the method comprising steps of:
- sorting said data units at each ingress module into ingress queues each of said ingress queues corresponding to an egress module;
switching said data units to respective egress modules;
sorting data units at each egress module into egress queues each of said egress queues corresponding to an ingress module; and
reassembling data units at each egress queue of said each egress module into data packets without reordering said data units.
7 Assignments
0 Petitions
Accused Products
Abstract
A packet switch includes ingress modules, egress modules, and a switch core. Packets of variable sizes may be divided into segments of predetermined sizes to facilitate switching within the switch core. The segmentation process may require null-padding which increases the flow rate within the switch. The segments are transferred from ingress to egress under flow-rate control based on inflating specified flow rates. Null padding is removed at egress. Ingress modules sort segments or packets according to their destination egress modules and egress modules sort segments or packets according to their ingress-module origin. Thus, segments of the same packet, and packets of the same stream, are properly concatenated as they appear in a logical buffer at egress. To enable growth of the packet switch to accommodate a very large number of ingress and egress modules, the switch implements a method of fast matching to schedule packet transfer across the switch core.
83 Citations
30 Claims
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1. A method of switching data units from a plurality of ingress modules to a plurality of egress modules through a switching fabric, the method comprising steps of:
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sorting said data units at each ingress module into ingress queues each of said ingress queues corresponding to an egress module;
switching said data units to respective egress modules;
sorting data units at each egress module into egress queues each of said egress queues corresponding to an ingress module; and
reassembling data units at each egress queue of said each egress module into data packets without reordering said data units. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A packet switch comprising:
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a plurality of ingress modules each operable to receive data packets and divide said packets into data segments;
a plurality of egress modules; and
a switch core operable to selectively switch said data segments to said egress modules;
wherein at least one of said ingress modules sorts said segments into ingress queues each ingress queue corresponding to a destination egress module; and
at least one of said egress modules sorts data segments it receives through said switch core into egress queues each egress queue corresponding to an ingress-module origin. - View Dependent Claims (11, 12, 13, 14)
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15. A method of switching packets of variable size comprising the steps of:
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dividing each packet at ingress into a number of segments each having a length upper bound;
null-padding each segment that is shorter than said upper bound;
prefixing each segment with a header;
transferring said data segments through a switch fabric; and
reconstructing each packet by removing the headers and any null padding;
wherein the segments are transferred from an ingress module to an egress module under rate regulation based on a specified transfer rate inflated by a factor determined according to null-data content. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. A method of fast matching of corresponding entries in at least two arrays each having the same number of entries, the method comprising steps of:
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dividing the at least two arrays into sets of corresponding sub-arrays each set comprising a sub-array of each of said at least two arrays;
dividing said sets into groups of sets;
concurrently processing all sets to determine matching entries for each set;
concurrently accumulating said matching entries for each of said groups to determine a matching outcome for each of said groups; and
accumulating the matching outcome for all groups to determine all matching entries. - View Dependent Claims (26, 27, 28)
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29. An apparatus for fast matching comprising:
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a plurality of sets of memory devices;
a plurality of matching circuits each associated with one of said sets of memory devices;
a plurality of transit data registers;
a plurality of group selectors each connecting at input to a group of said matching circuits and at output to one of said transit data registers; and
an output selector connecting at input to said transit data registers and at output to a result register;
wherein each of said group selectors cyclically transfers outputs of respective matching circuits to the transit register to which it is connected; and
said output selector cyclically transfers data from said transit registers to said result register. - View Dependent Claims (30)
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Specification