Testing method and testing device for semiconductor integrated circuits

• US 6,879,174 B2
• Filed: 08/30/2001
• Issued: 04/12/2005
• Est. Priority Date: 09/29/2000
• Status: Expired due to Fees

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Uchida, Ren
• Primary Examiner(s): Tokar, Michael
• Assistant Examiner(s): PATEL, PARESH H
• Application Number:
  US09/941,683
• Publication Number:
  US 20020039032A1
• Time in Patent Office: 1,321 Days
• Field of Search: 324/765, 324/158.1, 324/770, 345/84, 345 87- 89, 345/94, 345 98-100
• US Class Current: 324/762.02
• CPC Class Codes: G01R 31/2841 Signal generators

Abstract

The set values of the base power supply voltages are divided between 10 [V] and 0 [V], the upper limit value and the lower limit value of the drive voltage specification of a liquid crystal driver. A base power supply potential difference of 10 [V] between V1 to V2 of the base power supply terminals can be generated. By taking the gradation levels included between V1 to V2 of these base power supply terminals as test objects, each of the neighboring gradation output levels can mutually have a potential difference of about 200 [mV] (base power supply potential difference between the terminals 10000 [mV]/51 gradation levels). For the gradation levels included between these base power supply terminals, for every gradation level, test is performed while changing sequentially the input data and the setting of the judgment level of the comparator, and the gradation levels included in this interval are all tested.

Claims

1. A testing method for semiconductor integrated circuits,

said testing method testing by a semiconductor testing apparatus having a comparison judgment circuit judging a semiconductor integrated circuit integrated with a plurality of DA converters and a base voltage generation circuit determining gradation output voltage characteristics, by comparison of gradation output voltages of the semiconductor integrated circuit and reference voltages, comprising:

deciding gradation level intervals to be the test objects by the setting of different voltages to be applied at the base power supply input terminals of said base voltage generation circuit;

supplying said gradation output voltages at and between said voltages applied to said base power supply input terminals from said semiconductor testing apparatus; and

based on a correspondence between input gradation data signals of the gradation levels for a gradation level interval, and the gradation output voltages, testing the gradation output voltage through said semiconductor testing apparatus by making a digital judgment.

2. A testing method for semiconductor integrated circuits according to claim 1, wherein,

according to the gradation output voltages provided at and between the voltages applied to said base power supply input terminals from said semiconductor testing apparatus, said base voltage generation circuit increases or decreases the neighboring gradation output potential differences of every analog voltage output of said semiconductor integrated circuit.

3. A testing method for semiconductor integrated circuits according to claim 1, wherein,

by assigning correspondence between the voltage settings provided from said semiconductor testing apparatus and the input data, said DA converters and the base voltage generation circuit selectively test the output levels of the analog voltage outputs.

4. A testing method for semiconductor integrated circuits according to claim 1, wherein,

reliability of the test accuracy is acomplished by treating the mutual relationship between the computation of the input data corresponding to every output voltage level and of expectation values of the output voltages in a semiconductor integrated circuit specification and setting of the output voltage expectation value levels, and voltage judgment value levels of said comparison judgment circuit carrying out the judgment of the output voltages, and

change of the setting of the test numbers with time, altogether as address or parameter management.