Apparatus and method for an active power-on reset current comparator circuit

• US 6,879,194 B1
• Filed: 08/25/2003
• Issued: 04/12/2005
• Est. Priority Date: 08/25/2003
• Status: Active Grant

• Current Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Original Assignee: National Semiconductor Corporation (Texas Instruments, Inc.)
• Inventors: Caldwell, Joshua William
• Primary Examiner(s): ZWEIZIG, JEFFERY SHAWN
• Application Number:
  US10/648,530
• Time in Patent Office: 596 Days
• Field of Search: 327/142, 327/143, 327/198, 327/530, 327/534, 327/535, 327/538, 327/539, 327/543
• US Class Current: 327/143
• CPC Class Codes: H03K 17/223 in field-effect transistor switches

Abstract

An active power-on reset (POR) current comparator circuit creates a POR signal for resetting logic devices and masking reference startup signals during the initial power supply ramp of an integrated circuit. The comparator circuit provides a logic level signal (i.e., the POR signal) that will actuate when a bias current is above a predetermined level as compared to another current. The predetermined level for the bias current is set by a ratio established between two resistance levels within the active POR current comparator circuit.

Claims

1. An apparatus for producing a power-on reset signal, comprising:

a current generator circuit that includes a first resistance circuit coupled between a first node and a second node, wherein the current generator circuit is arranged to produce a first current at startup; and

a comparator stage that is coupled to the current generator and includes a second resistance circuit coupled between the first node and a third node, wherein the comparator stage is arranged to compare a second current to a third current such that the power-on reset signal is actuated when the third current is greater than the second current, wherein at least one of the second current and the third current corresponds to the first current according to a specified ratio such that a point is selectable during startup at which the power-on reset signal is actuated.

2. The apparatus of claim 1, further comprising a start-up circuit that is coupled to the current generator, the start-up circuit being arranged to prevent the current generator from producing the first current until a selected supply voltage is reached.

3. The apparatus of claim 1, further comprising a gain stage that is coupled to the comparator stage, the gain stage being arranged to provide clean up and gain to the power-on reset signal.

4. The apparatus of claim 1, wherein the current generator further comprises:

a current mirror that is coupled to a voltage supply;

a first transistor that is coupled to the current mirror;

a second transistor that is coupled to the current mirror, the first resistance circuit, and the first transistor, wherein the first current is produced when the current mirror is activated and the first current flows through the resistance circuit.

5. The apparatus of claim 1, wherein the comparator stage further comprises:

a current mirror that is coupled to a voltage supply;

a first transistor that is coupled to the current mirror;

a second transistor that is coupled to the current mirror, the second resistance circuit, and the first transistor, wherein the second current flows through the second resistance circuit and the third current flows through the second transistor.

6. The apparatus of claim 1, wherein the second current is substantially equal to the first current multiplied by 1/N, wherein N is a sealing factor corresponding to a ratio of sizes between the first resistance circuit that is included in the current generator and the second resistance circuit that is included in the comparator stage.

7. The apparatus of claim 6, wherein the comparator stage is further arranged such that selecting the scaling factor results in a selection of the point during startup at which the power-on reset signal is actuated.

8. The apparatus of claim 1, wherein the specified ratio for selecting a point during startup at which the power-on reset signal is actuated is dependent on a ratio sizes for transistors that are included in the current generator and the comparator stage.

9. A method, comprising:

producing a first current at startup, wherein the first current flows across a first resistance circuit that is coupled between a first node and a second node;

producing a second current at startup, wherein the second current flows across a second resistance circuit that is coupled between the first node and a third node and the second current corresponds to the first current according to a specified ratio;

producing a third current at startup, wherein the third current corresponds to the first current;

comparing the third current to the second current; and

actuating a power-on reset signal in response to the comparison of the third current to the second current, wherein the point during startup at which the power-on reset signal actuates is dependent on the specified ratio between the first current and the second current.

10. The method of claim 9, further comprising preventing the first current from being produced at startup until a specified supply voltage is reached.

11. The method of claim 9, further comprising providing gain to the power-on reset signal prior to providing the power-on reset signal to subsequent circuitry.

12. The method of claim 9, wherein comparing the third current to the second current further comprises comparing the third current to a mirror of the second current.

13. The method of claim 9, wherein N is a scaling factor corresponding to a ratio equal to the first current multiplied by 1N, wherein N is a scaling factor corresponding to a ratio of sizes between the first resistance circuit and the second resistance circuit.

14. The method of claim 13, wherein selecting the scaling factor results in a selection of the point during startup at which the power-on reset signal is actuated.

15. The method of claim 9, wherein the specified ratio for selecting a point during startup at which the power-on reset signal is actuated is dependent on a ratio of sizes for transistors.

16. An apparatus, comprising:

means for producing a first current at startup, wherein the first current flows across a first resistance circuit that is coupled between a first node and a second node;

means for producing a second current at startup, wherein the second current flows across a second resistance circuit that is coupled between the first node and a third node and the second current corresponds to the first current according to a specified ratio;

means for producing a third current at startup, wherein the third current corresponds to the first current;

means for comparing the third current to the second current; and

means for actuating a power-on reset signal in response to the comparison of the third current to the second current, wherein the point during startup at which the power-on reset signal actuates is dependent on the specified ratio between the first current and the second current.

17. The apparatus of claim 16, further comprising means for preventing the first current from being produced at startup until a specified supply voltage is reached.

18. The apparatus of claim 16, further comprising means for providing gain to the power-on reset signal prior to providing the power-on reset signal to subsequent circuitry.

19. The apparatus of claim 16, wherein the second current is substantially equal to the first current multiplied by 1/N, wherein N is a scaling factor corresponding to a ratio of sizes between the first resistance circuit and the second resistance circuit.

20. The apparatus of claim 16, wherein the specified ratio for selecting a point during startup at which the power-on reset signal is actuated is dependent on a ratio of sizes for transistors.