Method and system for minimizing differential amplifier power supply sensitivity

• US 6,879,534 B2
• Filed: 11/01/2002
• Issued: 04/12/2005
• Est. Priority Date: 11/01/2002
• Status: Expired due to Term

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Smith, Kenneth, Perner, Frederick
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): PHAM, LY D
• Application Number:
  US10/286,577
• Publication Number:
  US 20040085122A1
• Time in Patent Office: 893 Days
• Field of Search: 365/209, 365/196, 365/189.09, 365/207, 365/189.07, 327/343, 327/103
• US Class Current: 365/209
• CPC Class Codes: G05F 3/205 Substrate bias-voltage generators for static stores G11C5/146
• CPC Class Codes: H03F 3/45183 Long tailed pairs H03F3/4521, H03F3/45237 take precedence
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit

Abstract

The invention includes an apparatus and a method for minimizing power supply sensitivity of a differential amplifier. The apparatus includes a current source providing a differential amplifier bias current to a common source node of the differential amplifier. A voltage sensor senses variations of a power supply associated with the current source. Variations sensed by the voltage sensor control a magnitude of the differential amplifier bias current. The method includes a current source providing the source current. A voltage potential of the common source node is sensed. The current source is adjusted depending upon the sensed voltage potential of the common source node, thereby adjusting a magnitude of the source current.

Claims

1. An apparatus for minimizing power supply sensitivity of a differential amplifier, comprising:

a current source providing a differential amplifier bias current to a common source node of the differential amplifier, the current source comprising a current mirror, the current mirror comprising an amplifier bias current transistor;

a voltage sensor for sensing variations of a power supply associated with the current source;

wherein

variations sensed by the voltage sensor control a magnitude of the differential amplifier bias current by adjusting a back gate bias of the amplifier bias current transistor.

2. The apparatus for minimizing power supply sensitivity of claim 1, wherein the magnitude of the differential current bias current is adjusted to minimize voltage potential variations of the common source node caused by variations of the power supply.

3. The apparatus for minimizing power supply sensitivity of claim 1, wherein the provided differential amplifier bias current mirrors a current mirror bias current, and wherein the differential amplifier bias current is adjusted by adjusting the current mirror bias current.

4. The apparatus for minimizing power supply sensitivity of claim 1, wherein the voltage sensor comprises:

a reference voltage potential;

a comparison circuit that compares the reference voltage potential with the power supply, and generates the differential amplifier bias current control.

5. The apparatus for minimizing power supply sensitivity of claim 1, wherein the voltage sensor comprises:

a reference voltage potential;

a comparison circuit that compares the reference voltage potential with a voltage potential of the common source node, and generates the differential amplifier bias current control.

6. The apparatus for minimizing power supply sensitivity of claim 1, wherein transistors within the differential amplifier and the current source comprise long channels, making the transistors less sensitive in saturation mode.

7. An apparatus for minimizing power supply sensitivity of a differential amplifier, comprising:

a current mirror providing a differential amplifier bias current to a common source node of the differential amplifier, the current mirror comprising an amplifier bias current transistor and a mirror transistor, the amplifier bias current transistor providing the differential amplifier bias current and the mirror transistor providing a mirror bias current;

a voltage sensor for sensing variations of a power supply associated with the current source;

wherein

variations sensed by the voltage sensor control a magnitude of the differential amplifier bias current by adjusting a magnitude of the mirror bias current by adjusting a back gate bias of the amplifier bias current transistor.

8. The apparatus for minimizing power supply sensitivity of a differential amplifier of claim 7, wherein variations sensed by the voltage sensor additionally control a magnitude of the differential amplifier bias current by adjusting characteristics of the amplifier bias current transistor.

9. An apparatus for minimizing power supply sensitivity of a differential amplifier, comprising:

a current mirror providing a differential amplifier bias current to a common source node of the differential amplifier, the current mirror comprising an amplifier bias current transistor and a mirror transistor, the amplifier bias current transistor providing the differential amplifier bias current and the mirror transistor providing a mirror bias current;

a voltage sensor for sensing variations of a power supply associated with the current source;

wherein

variations sensed by the voltage sensor control a magnitude of the differential amplifier bias current by adjusting a back gate bias of at least one of the amplifier bias current transistor and the mirror transistor.

10. An apparatus for minimizing power supply sensitivity of a differential amplifier, comprising:

a current source providing a differential amplifier bias current to a common source node of the differential amplifier, the current source comprising a current mirror, the current mirror comprising an amplifier bias current transistor and mirror transistor;

a voltage sensor for sensing variations of a power supply associated with the current source;

wherein

variations sensed by the voltage sensor control a magnitude of the differential amplifier bias current by adjusting a back gate bias of the mirror transistor.

11. An apparatus for minimizing power supply sensitivity of a differential amplifier, comprising:

a current source providing a differential amplifier bias current to a common source node of the differential amplifier, the current source comprising a current mirror, the current mirror comprising an amplifier bias current transistor and mirror transistor, the amplifier bias current transistor comprising a plurality of sub-bias current transistors;

a voltage sensor for sensing variations of a power supply associated with the current source;

wherein

variations sensed by the voltage sensor control a magnitude of the differential amplifier bias current by controlling an inclusion of a number of parallel sub-bias current transistors, wherein each included sub-bias current transistors contributes to the differential amplifier bias current.

12. An apparatus for minimizing power supply sensitivity of a differential amplifier, comprising:

a current source providing a differential amplifier bias current to a common source node of the differential amplifier, the current source comprising a current mirror, the current mirror comprising an amplifier bias current transistor and mirror transistor, the amplifier bias current transistor comprises a parallel bias current transistor;

a voltage sensor for sensing variations of a power supply associated with the current source;

wherein variations sensed by the voltage sensor control a magnitude of the differential amplifier bias current by adjusting a bias of the parallel bias current transistor, wherein the parallel bias current transistor contributes to the differential amplifier bias current.