Integrated switchless programmable attenuator and low noise amplifier
First Claim
1. An integrated receiver front end comprising:
- an attenuator including a ladder network having multiple tap points, each providing a differing value of attenuation; and
multiple differential pair amplifiers, each differential pair amplifier connected to a corresponding different tap point and selectively turned on, individually or as a group, to amplify the previously attenuated signal and provide a combined output with a low noise figure;
wherein said differential pair amplifier includes a pair of transistors with a first gate coupled to ground and a second gate coupled to said attenuator tap point, and sources coupled to each other.
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Abstract
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.
116 Citations
4 Claims
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1. An integrated receiver front end comprising:
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an attenuator including a ladder network having multiple tap points, each providing a differing value of attenuation; and
multiple differential pair amplifiers, each differential pair amplifier connected to a corresponding different tap point and selectively turned on, individually or as a group, to amplify the previously attenuated signal and provide a combined output with a low noise figure;
wherein said differential pair amplifier includes a pair of transistors with a first gate coupled to ground and a second gate coupled to said attenuator tap point, and sources coupled to each other. - View Dependent Claims (2, 3, 4)
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Specification