Bias circuit linearization and dynamic power control

• US 6,882,227 B2
• Filed: 09/15/2003
• Issued: 04/19/2005
• Est. Priority Date: 09/13/2002
• Status: Active Grant

• Current Assignee: Skyworks Solutions Incorporated
• Original Assignee: Anadigics Incorporated (Coherent Corp.)
• Inventors: Smith, Thomas B., Trippe, Michael W., Barry, Daryl W., Chun, Carl S., Han, Sangwoo
• Primary Examiner(s): Choe, Henry
• Application Number:
  US10/662,849
• Publication Number:
  US 20040130374A1
• Time in Patent Office: 582 Days
• Field of Search: 330/296, 330/285, 330/302, 330/297, 330/288, 323/315, 323/316
• US Class Current: 330/296
• CPC Class Codes: H03F 1/0261 with control of the polarisation voltage or current, e.g. gliding Class A
• CPC Class Codes: H03F 1/30 Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in differential amplifiers H03F3/45479
• CPC Class Codes: H03F 1/302 in bipolar transistor amplifiers H03F1/303, H03F1/305, H03F1/307 take precedence
• CPC Class Codes: H03F 1/32 Modifications of amplifiers to reduce non-linear distortion by negative feedback H03F1/34
• CPC Class Codes: H03F 2200/225 the input circuit of an amplifying stage comprising an LC-network

Abstract

A transistor bias circuit is provided that is capable of biasing an amplifier transistor having a control terminal, a current-sink terminal, and a current-source terminal in order to control inter-modulation and linearize the output corresponding to radio frequency and microwave frequency ranges. Additionally, an embodiment of the present circuit is capable of dynamic power control. The transistor bias circuit according to the present invention utilizes a leakage current to alter the electrical characteristics of the amplifier transistor. The bias circuit comprises a bias transistor having a control terminal, a current-sink terminal, and a current-source terminal. Additionally, at least one DC input port, at least one resonator element, a diode element, and a resistive element is provided.

Claims

1. A circuit for biasing an amplifier transistor comprising a control terminal, a current-sink terminal, and a current-source terminal, the circuit comprising:

a bias transistor including a control terminal, current-sink terminal, and a current-source terminal;

a first DC input port connected to the current sink terminal of the bias transistor;

a first resonator element operatively coupled to the current-sink terminal of the bias transistor and ground;

a second DC input port connected to the control terminal of the bias transistor;

a diode element operatively coupled to the control terminal of the bias transistor and ground;

a second resonator element operatively coupled to the control terminal of the bias transistor and ground; and

a resistive element operatively coupled to the current source terminal of the bias transistor and the control terminal of the amplifier transistor.

2. The circuit as set forth in claim 1 wherein the bias transistor is one of a BJT, an HBT and a FET.

3. The circuit as set forth in claim 1 wherein the amplifier transistor is one of a BJT, an HBT and a FET.

4. The circuit as set forth in claim 1 wherein the first resonator is an RLC circuit.

5. The circuit as set forth in claim 1 wherein the diode element comprises a plurality of diodes.

6. The circuit as set forth in claim 1 wherein the second resonator is an RLC circuit.

7. The circuit as set forth in claim 1 wherein the resistive element is a resistor.

8. The circuit as set forth in claim 1 wherein the resistive element is an RLC circuit.

9. The circuit as set forth in claim 8 wherein the resistive element further comprises a resistor.