Image data output controller using double buffering

• US 6,885,377 B2
• Filed: 10/23/2002
• Issued: 04/26/2005
• Est. Priority Date: 11/19/2001
• Status: Expired due to Fees

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lim, Chae-Whan, Kim, Soon-Jin
• Primary Examiner(s): Bella, Matthew C.
• Assistant Examiner(s): Hsu, Joni
• Application Number:
  US10/278,291
• Publication Number:
  US 20030095125A1
• Time in Patent Office: 916 Days
• Field of Search: 345/539, 345/531, 345/532, 345/562, 345/537
• US Class Current: 345/539
• CPC Class Codes: G09G 5/346 for systems having a bit-mapped display memory
• CPC Class Codes: G09G 5/393 Arrangements for updating the contents of the bit-mapped memory
• CPC Class Codes: G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Abstract

An image data output control apparatus for enhancing a screen update speed to naturally update a screen is provided. The image data output control apparatus comprises first and second memories each for buffering image data of one screen, a host processor for selecting the first and second memories alternately as a display buffer for output of image data of a current screen and a screen buffer for storage of image data of a subsequent new screen, writing the image data of the subsequent screen into the screen buffer to construct the subsequent screen, and outputting the image data of the current screen stored in the display buffer. An output terminal outputs image data from any one of the first and second memories as image data for a screen to be displayed through a display unit.

Claims

1. An image data output control apparatus for a portable terminal, the apparatus comprising:

first and second memories each for buffering image data, the image data being displayed on one screen;

a host processor for

selecting said first and second memories alternately as

a display buffer for output of image data of a current screen and

a screen buffer for storage of image data of a subsequent screen,

writing said image data of said subsequent screen into said screen buffer to construct said subsequent screen, and

outputting said image data of said current screen stored in said display buffer;

an output terminal for outputting image data from one of said first and second memories as image data for a screen to be displayed through a display unit;

an access selector for connecting one of said first and second memories to said host processor, said one of said first and second memories selected as said screen buffer by said host processor,

a display selector for connecting another one of said first and second memories to said output terminal, said another one of said first and second memories selected as said display buffer by said host processor; and

a host interface for providing an interface for access to said first and second memories by said host processor and for control of said access selector and display selector by said host processor.

2. An image data output control apparatus for a portable terminal, the apparatus comprising:

first and second memories each for buffering image data of one screen;

a host processor for

selecting said first and second memories alternately as a display buffer for output of image data of a current screen and a screen buffer for storage of image data of a subsequent new screen,

copying blocks of image data stored in said first and second memories to one of said first and second memories,

writing said image data of said subsequent screen into said screen buffer to construct said subsequent screen, and

outputting said image data of said current screen stored in said display buffer;

a direct memory access controller (DMAC) for copying a block of image data stored in said first and second memories to a destination region, the block of image data designated as a source region by said host processor;

an output terminal for outputting image data from one of said first and second memories as image data for a screen to be displayed through a display unit;

an access selector for connecting one of said first and second memories to said host processor, said one of said first and second memories selected as said screen buffer by said host processor, and for selectively connecting said first and second memories to said DMAC;

a display selector for connecting another one of said first and second memories to said output terminal, said another one of said first and second memories selected as said display buffer by said host processor; and

a host interface for providing an interface for access to said first and second memories by said host processor and for control of said DMAC, access selector, and display selector by said host processor.

3. The image data output control apparatus as set forth in claim 2, wherein said host processor is adapted to control said DMAC to perform a block copy between said first and second memories or within said first or second memory.