Design driven inspection or measurement for semiconductor using recipe

• US 6,886,153 B1
• Filed: 12/21/2001
• Issued: 04/26/2005
• Est. Priority Date: 12/21/2001
• Status: Expired due to Term

• Current Assignee: KLA-Tencor Corporation (KLA Corporation)
• Original Assignee: KLA-Tencor Corporation (KLA Corporation)
• Inventors: Bevis, Christopher F.
• Primary Examiner(s): DO, THUAN V
• Application Number:
  US10/029,521
• Time in Patent Office: 1,222 Days
• Field of Search: 356/237, 356/394, 716/4, 716/19, 716/21, 716/20, 700/121, 382/149
• US Class Current: 716/51
• CPC Class Codes: G03F 7/70533 Controlling abnormal operating mode, e.g. taking account of waiting time, decision to rework or rework flow
• CPC Class Codes: G03F 7/70633 Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching

Abstract

Design driven inspection/metrology methods and apparatus are provided. A recipe is a set of instructions including wafer processing parameters, inspection parameters, or control parameters for telling an inspection/metrology system how to inspect/measure a wafer. Design data is imported into a recipe extraction system that recognizes instances of target structures and configures recipe parameters accordingly, thereby reducing manual instrument setup time, improving inspection/measurement accuracy, and improving fabrication efficiency.

Claims

1. For an instrument responsive to recipe parameters, a method for creating a recipe, the method comprising:

accessing mask set data;

recognizing a target structure in the mask set data;

extracting parameters from the mask set data; and

configuring the recipe based on the extracted parameters responsive to the recognized target structure, wherein the configuration of the recipe is performed before a wafer printed with a mask created from the mask set data is generated.

2. The method of claim 1 wherein the parameters for a process layer are queried from a database.

3. The method of claim 1 wherein the extracted parameters comprises at least one of wafer processing parameters, inspection parameters, and control parameters.

4. The method of claim 1 wherein the target structure comprises at least one of alignment site, measurement site, overlay target, and array element.

5. For an instrument instructed by a recipe to perform a task on a wafer, a method comprising:

receiving design data describing a die;

extracting parameters from the design data relevant to the configuration of the instrument; and

creating from the extracted parameters, the recipe for performing the task, wherein the recipe is created before a wafer to which the design data has been applied is generated.

6. The method of claim 5 wherein the task includes at least one of inspection and metrology.

7. The method of claim 5 further comprising applying the extracted parameters to at least one die on the wafer using a stepper setup file.

8. The method of claim 5 wherein the design data includes at least one of element names and instance types.

9. The method of claim 5 further comprising inspecting the wafer using the recipe.

10. The method of claim 9 wherein the inspecting is micro inspection.

11. The method of claim 9 wherein the inspecting is macro inspection.

12. The method of claim 9 wherein the inspecting is darkfield inspection.

13. The method of claim 5 further comprising measuring the wafer using the recipe.

14. The method of claim 13 wherein the measuring is film measurement.

15. The method of claim 13 wherein the measuring is critical dimension measurement.

16. The method of claim 13 wherein the measuring is overlay measurement.

17. A recipe extraction system using design data specifying one or more die, the system comprising:

an access module to access the design data describing a die;

an analyzer to extract parameters from the design data; and

a configuration module to produce a recipe for controlling one of an inspection and a metrology instrument, wherein the configuration module produces the recipe before a wafer to which the design data has been applied is generated.

18. The system of claim 17 wherein the access module is a network interface.

19. The system of claim 17 wherein the analyzer performs overlay recipe extraction.

20. The system of claim 17 wherein the analyzer performs inspection recipe extraction.

21. The system of claim 17 wherein the recipe is a set of instructions for measuring a wafer.

22. The system of claim 17 wherein the recipe is a set of instructions for inspecting a wafer.

23. An inspection/metrology instrument using design data specifying one or more die, the instrument comprising:

an input interface for accessing the design data describing a die;

an analyzer to recognize target structures in the design data and extract parameters from the design data; and

a recipe module creating a recipe based on the extracted parameters responsive to the recognized target structure, wherein the recipe module creates the recipe before a wafer to which the design data has been applied is generated.