Portable electronic apparatus, IC card and reader/writer
First Claim
Patent Images
1. A portable electronic apparatus comprising:
- a clock generation circuit, said clock generation using a received signal to generate a clock signal and a sampling signal, received data being the information transmitted to said portable electronic apparatus by way of said received signal, said sampling signal having a plurality of pulses during each cycle of said clock signal, a plurality of logic levels being generated during said each cycle of said clock signal, a logic level of said plurality of logic levels being the signal level of said received signal when sampled by a pulse of said plurality of pulses; and
a decoder, said decoder decoding said plurality of logic levels to generate said received data.
1 Assignment
0 Petitions
Accused Products
Abstract
A portable electronic apparatus is disclosed which comprises a detecting element for detecting a high-frequency signal received by an antenna and for outputting the detected signal, a sampling element for sampling the detected signal with regard to a frequency higher than a clock frequency of the detected signal and for outputting sampled results, and a decoding element for decoding data transmitted by the high-frequency signal by use of the signal level distribution of the detected signal derived from the sampled results.
28 Citations
25 Claims
-
1. A portable electronic apparatus comprising:
-
a clock generation circuit, said clock generation using a received signal to generate a clock signal and a sampling signal, received data being the information transmitted to said portable electronic apparatus by way of said received signal, said sampling signal having a plurality of pulses during each cycle of said clock signal, a plurality of logic levels being generated during said each cycle of said clock signal, a logic level of said plurality of logic levels being the signal level of said received signal when sampled by a pulse of said plurality of pulses; and
a decoder, said decoder decoding said plurality of logic levels to generate said received data. - View Dependent Claims (2, 3, 4, 5)
-
-
6. An IC card for receiving data transmitted by a reader/writer and for outputting data from an internal memory in return, said IC card comprising:
-
a clock generation circuit, said clock generation circuit using a received signal to generate a clock signal and a sampling signal, received data being the information transmitted to said IC card by way of said received signal, said sampling signal having a plurality of pulses during each cycle of said clock signal, a plurality of logic levels being generated during said each cycle of said clock signal, a logic level of said plurality of logic levels being the signal level of said received signal when sampled by a pulse of said plurality of pulses; and
a decoder, said decoder decoding said plurality of logic levels to generate said received data. - View Dependent Claims (7, 8, 9)
-
-
10. A reader/writer for receiving data transmitted by an IC card, said reader/writer comprising:
-
a clock generation circuit, said clock generation circuit using a received signal to generate a clock signal and a sampling signal, received data being the information transmitted to said reader/writer by way of said received signal, said sampling signal having a plurality of pulses during each cycle of said clock signal, a plurality of logic levels being generated during said each cycle of said clock signal, a logic level of said plurality of logic levels being the signal level of said received signal when sampled by a pulse of said plurality of pulses; and
a decoder, said decoder decoding said plurality of logic levels to generate said received data. - View Dependent Claims (11, 12, 13)
-
-
14. A portable electronic apparatus comprising:
-
a clock generation circuit, said clock generation circuit using a received signal to generate a clock signal, received data being the information transmitted to said portable electronic apparatus by way of said received signal; and
a correlation value detection circuit, said correlation value detection circuit comparing the phase of said clock signal to the phase of said received signal to generate a correlation value signal, said correlation value signal trending in a first direction when sail clock signal is in phase with said received signal and trending in a direction opposite to said first direction when said clock signal is out of phase with said received signal;
a determination circuit, said determination circuit using said correlation value signal to generate said received data. - View Dependent Claims (15, 16, 17)
-
-
18. An IC card for receiving data transmitted by a reader/writer and for outputting data from an internal memory in return, said IC card comprising:
-
a clock generation circuit, said clock generation circuit using a received signal to generate a clock signal, received data being the information transmitted to said IC card by way of said received signal; and
a correlation value detection circuit, said correlation value detection circuit comparing the phase of said clock signal to the phase of said received signal to generate a correlation value signal, said correlation value signal trending in a first direction when said clock signal is in phase with said received signal and trending in a direction opposite to said first direction when said clock signal is out of phase with said received signal;
a determination circuit, said determination circuit using said correlation value signal to generate said received data. - View Dependent Claims (19, 20, 21)
-
-
22. A reader/writer for receiving data transmitted by an IC card, said reader/writer comprising:
-
a clock generation circuit, said clock generation circuit using a received signal to generate a clock signal, received data being the information transmitted to said reader/writer by way of said received signal; and
a correlation value detection circuit, said correlation value detection circuit comparing the phase of said clock signal to the phase of said received signal to generate a correlation value signal, said correlation value signal trending in a first direction when said clock signal is in phase with said received signal and trending in a direction opposite to said first direction when said clock signal is out of phase with said received signal;
a determination circuit, said determination circuit using said correlation value signal to generate said received data. - View Dependent Claims (23, 24, 25)
-
Specification
-
- Resources
Litigation Campaign Assessment
Thank you for your request. You will receive a custom alert email when the Litigation Campaign Assessment is available.
×
-
Current AssigneeSony Corporation (Sony Group Corp.)
-
Original AssigneeSony Corporation (Sony Group Corp.)
-
InventorsArisawa, Shigeru, Murayama, Yuji
-
Primary Examiner(s)Lee, Michael G.
-
Assistant Examiner(s)Labaze, Edwyn
-
Application NumberUS09/739,318Publication NumberTime in Patent Office1,596 DaysField of Search235/492, 235/375, 235/380, 235382-383, 235/441, 235/385, 705 22- 23, 705/28, 375/355, 375/326, 375/367, 375/208, 375/200US Class Current235/492CPC Class CodesG06K 19/0723 the record carrier comprisi...G06K 7/0008 General problems related to...
