Semiconductor device and fabrication method thereof
First Claim
Patent Images
1. A semiconductor device having a plurality of thin film transistors, each of the plurality of thin film transistors having:
- a gate electrode over a substrate;
an active layer comprising a semiconductor film over said gate electrode, the active layer having at least a channel forming region, source and drain regions, LDD regions, and end portions;
an insulating film over said active layer and having at least one opening, said opening located so as not to overlap with said gate electrode; and
an electrode on said insulating film, said electrode connected to one of said source and drain regions through said opening, wherein said electrode is located so as to cover one of the end portions of said active layer with said insulating film interposed therebetween, and wherein inner boundaries of said opening are aligned with boundaries of said one of said source and drain regions connected with said electrode and one of said LDD regions extends to surround said one of the said source and drain regions.
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Abstract
To provide a technology for fabricating a bottom gate type TFT by steps having high mass production performance, an insulating film whose major component is silicon is formed on an active layer, the insulating film is patterned and openings are formed at portions thereof constituting source and drain regions at later steps, a resist is provided right above a portion for forming a channel forming region at later steps, a step of adding an impurity is carried out and in this case, the patterned insulating film is utilized as a doping mask.
86 Citations
80 Claims
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1. A semiconductor device having a plurality of thin film transistors, each of the plurality of thin film transistors having:
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a gate electrode over a substrate;
an active layer comprising a semiconductor film over said gate electrode, the active layer having at least a channel forming region, source and drain regions, LDD regions, and end portions;
an insulating film over said active layer and having at least one opening, said opening located so as not to overlap with said gate electrode; and
an electrode on said insulating film, said electrode connected to one of said source and drain regions through said opening, wherein said electrode is located so as to cover one of the end portions of said active layer with said insulating film interposed therebetween, and wherein inner boundaries of said opening are aligned with boundaries of said one of said source and drain regions connected with said electrode and one of said LDD regions extends to surround said one of the said source and drain regions. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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15. A semiconductor device having a plurality of thin film transistors, each of the plurality of thin film transistors having:
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a gate electrode over a substrate;
an active layer comprising a semiconductor film over said gate electrode, said active layer having at least a channel forming region, source and drain regions, LDD regions and end portions;
an insulating film over said active layer and having at least one opening located so as not to overlap with said gate electrode; and
an electrode on said insulating film, said electrode connected to one of said source and drain regions through said opening, wherein said electrode is located so as to cover one of the end portions of said active layer with said insulating film interposed therebetween, wherein inner boundaries of said opening are aligned with boundaries of said one of said source and drain regions connected with said electrode, and wherein said end portions have a same impurity concentration as said LDD regions and one of said LDD regions extends to surround said one of the said source and drain regions. - View Dependent Claims (16, 17, 18, 19, 20)
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21. A semiconductor device having a plurality of thin film transistors, each of the plurality of thin film transistors comprising:
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at least one gate electrode on an insulating surface over a substrate;
an active layer comprising a semiconductor film over said gate electrode, the active layer having at least a channel forming region, source and drain regions, LDD regions, and end portions, and said source and drain regions located so as not to overlap with said gate electrode; and
an insulating film covering at least the channel forming region, the LDD regions and the end portions of the active layer, said insulating film having at least an opening; and
an electrode on said insulating film, said electrode connected to one of said source and drain regions through said opening, wherein said electrode is located so as to cover one of said end portions of said active layer with said insulating film interposed therebetween; and
wherein inner boundaries of said opening are aligned with boundaries of said one of said source and drain regions connected with said electrode and one of said LDD regions extends to surround said one of said source and drain regions. - View Dependent Claims (22, 23, 24, 25, 26, 27)
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28. A semiconductor device comprising at least one NTFT and at least one PTFT, each of the NTFT and the PTFT comprising:
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a gate electrode on an insulating surface over a substrate;
an active layer comprising a semiconductor film over the gate electrode, the active layer having at least a channel forming region, source and drain regions, and end portions, the source and drain regions located so as not to overlap with said gate electrode;
an insulating film over said active layer and having at least one opening;
an electrode on said insulating film, said electrode connected to one of said source and drain regions through said opening; and
an interlayer insulating film over said insulating film and said electrode, wherein said electrode is located so as to cover one of the end portions of said active layer with said insulating film interposed therebetween, wherein the active layer of the NTFT further comprises LDD regions and said channel forming region and portions of the LDD regions are located so as to overlap with said gate electrode, and wherein inner boundaries of said opening are aligned with boundaries of said one of said source and drain regions connected with said electrode and one of said LDD regions extends to surround said one of said source and drain regions. - View Dependent Claims (29, 30, 31, 32, 33, 34, 35)
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36. A semiconductor device comprising:
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a gate electrode on an insulating surface over a substrate;
an active layer comprising a semiconductor film over the gate electrode with a gate insulating film interposed therebetween, the active layer having at least a channel forming region, source and drain regions, LDD regions, and end portions, and said source and drain regions located so as not to overlap with said gate electrode;
an insulating film covering the channel forming region, the LDD regions, and the end portions of the active layer, said insulating film having openings;
source and drain electrodes on said insulating film, said source and drain electrodes connected to said source and drain regions through said openings, respectively;
an interlayer insulating film over said insulating film and said source and drain electrodes; and
a pixel electrode formed on said interlayer insulating film, said pixel electrode electrically connected to one of said source and drain regions, wherein at least one of said source and drain electrodes is located so as to cover an one of end portions of said active layer with said insulating film interposed therebetween, wherein inner boundaries of one of said openings are aligned with boundaries of said one of said source and drain regions and one of said LDD regions extends to surround said one of said source and drain regions, and wherein the source and drain electrodes are not contact with the gate insulating film. - View Dependent Claims (37, 38, 39, 40, 41, 42, 43)
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44. A semiconductor device having an electroluminescence display device formed over a substrate and comprising a plurality of thin film transistors, each of said plurality of thin film transistors comprising:
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at least one gate electrode on an insulating surface over the substrate;
an active layer comprising a semiconductor film over said gate electrode, the active layer having at least a channel forming region, a pair of first impurity regions, a pair of second impurity regions and end portions; and
an insulating film covering at least the channel forming region and said end portions, and said pair of second impurity regions, said insulating film having at least one opening, said opening located so as not to overlap with said gate electrode; and
an electrode on said insulating film, said electrode connected to one of said pair of first impurity regions through said opening, wherein said pair of first impurity regions and said pair of second impurity regions include the same impurity for giving one type of conductivity and an impurity concentration of said pair of first impurity regions is higher than that of said pair of second impurity regions, wherein said electrode is located so as to cover one of the end portions of said active layer with said insulating film interposed therebetween, and wherein inner boundaries of said opening are aligned with boundaries of said one of said pair of first impurity regions connected with said electrode and one of said pair of second impurity regions extends to surround said one of said pair of first impurity regions. - View Dependent Claims (45, 46, 47, 48, 49, 50)
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51. A semiconductor device having an electroluminescence display device formed over a substrate and comprising a plurality of thin film transistors, each of said plurality of thin film transistors comprising:
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at least one gate electrode on an insulating surface over said substrate;
an active layer comprising a semiconductor film over said gate electrode, the active layer having at least a channel forming region, first impurity regions, second impurity regions, and end portions, and said channel forming region and portions of the second impurity regions are located so as to overlap with said gate electrode;
an insulating film over said channel forming region and the second impurity regions of the active layer and having at least one opening; and
an electrode on said insulating film, said electrode connected to one of said first impurity regions through said opening, wherein said first impurity regions and said second impurity regions include the same impurity for giving one type of conductivity and an impurity concentration of said first impurity regions is higher than that of said second impurity regions, wherein said electrode is located so as to cover one of the end portions of said active layer with said insulating film interposed therebetween, and wherein inner boundaries of said opening are aligned with boundaries of said one of said first impurity regions connected with said electrode and one of said second impurity regions extends to surround said one of said first impurity regions. - View Dependent Claims (52, 53, 54, 55, 56, 57)
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58. A semiconductor device having an electroluminescence display device formed over a substrate and comprising a plurality of thin film transistors, each of said plurality of thin film transistors comprising:
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at least one gate electrode on an insulating surface over said substrate;
an active layer comprising a semiconductor film over said gate electrode, said active layer having at least a channel forming region, source and drain regions, LDD regions and end portions;
an insulating film covering at least the channel forming region, the LDD regions and the end portions of the active layer, said insulating film having at least one opening, which is located so as not to overlap with said gate electrode; and
an electrode on said insulating film, said electrode connected to one of said source and drain regions through said opening, wherein said electrode is located so as to cover at least one of said end portions of said active layer with said insulating film interposed therebetween; and
wherein inner boundaries of said opening are aligned with boundaries of said one of said source and drain regions connected with said electrode and one of said LDD regions extends to surround said one of said source and drain regions. - View Dependent Claims (59, 60, 61, 62, 63, 64)
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65. A semiconductor device comprising:
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a gate electrode on an insulating surface over a substrate;
an active layer comprising a semiconductor film over the gate electrode with a gate insulating film interposed therebetween, the active layer having at least a channel forming region, source and drain regions, LDD regions and end portion, and said source and drain regions located so as not to overlap with said gate electrode;
an insulating film covering the channel forming region, the LDD regions and the end portions of the active layer, said insulating film having openings;
source and drain electrodes on said insulating film, said source and drain electrodes connected to said source and drain regions through said openings, respectively;
an interlayer insulating film over said insulating film and said source and drain electrodes; and
a pixel electrode formed on said interlayer insulating film, said pixel electrode electrically connected to one of said source and drain regions, wherein at least one of said source and drain electrodes is located so as to cover one of said end portions of said active layer with said insulating film interposed therebetween, wherein inner boundaries of one of said openings are aligned with boundaries of said one of said source and drain regions and one of said LDD regions extends to surround said one of said source and drain regions, and wherein the source and drain electrodes are not in contact with the gate insulating film. - View Dependent Claims (66, 67, 68, 69, 70, 71, 72)
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73. A semiconductor device comprising:
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a gate electrode on an insulating surface over a substrate;
an active layer comprising a semiconductor film over the gate electrode with a gate insulating film interposed therebetween, the active layer having at least a channel forming region, source and drain regions, LDD regions and end portions, and said source and drain regions located so as not to overlap with said gate electrode;
an insulating film covering the channel forming region, the LDD regions and the end portions of the active layer, said insulating film having openings;
source and drain electrodes on said insulating film, said source and drain electrodes connected to said source and drain regions through said openings, respectively;
an interlayer insulating film over said insulating film and said source and drain electrodes; and
a pixel electrode formed on said interlayer insulating film, said pixel electrode electrically connected to one of said source and drain regions, wherein at least one of said source and drain electrodes is located so as to cover one of said end portions of said active layer with said insulating film interposed therebetween, wherein inner boundaries of one of said opening openings are aligned with boundaries of said one of said source and drain regions and one of said LDD regions extends to surround said one of said source and drain regions, and wherein the source and drain electrodes are not in contact with the gate insulating film. - View Dependent Claims (74, 75, 76, 77, 78, 79, 80)
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Specification