Method and apparatus for selecting and aligning cells using a placement tool

• US 6,889,370 B1
• Filed: 06/20/2000
• Issued: 05/03/2005
• Est. Priority Date: 06/20/2000
• Status: Expired due to Fees

• Current Assignee: Unisys Corporation
• Original Assignee: Unisys Corporation
• Inventors: Rezek, James Edward, Kerzman, Joseph Peter
• Primary Examiner(s): Siek, Vuthe
• Assistant Examiner(s): ROSSOSHEK, YELENA
• Application Number:
  US09/597,529
• Time in Patent Office: 1,778 Days
• Field of Search: 716/1, 716/2, 716/4, 716/5, 716/6, 716/7, 716/8, 716/9, 716/10, 716/11, 716/12, 716/13, 716/14, 716/16, 716 17- 18, 703/15, 430/15, 430/5, 365/230.05, 326/41, 257/35, 257/635, 715/507, 714/727
• US Class Current: 716/119
• CPC Class Codes: G06F 30/392 Floor-planning or layout, e.g. partitioning or placement

Abstract

Methods and apparatus for efficiently identifying, selecting and aligning cells within a circuit design are disclosed. Preferably, a net or group-of nets is first identified by the circuit designer. Then, selected cells that are connected to the selected net or group of nets are identified by the placement tool. A qualification or filter may be provided for filtering which cells are selected. For example, the filter may allow only those cells that are source cells, destination cells, placed cells, unplaced cells, etc., or any combination thereof to be selected. The selected cells may be aligned in a direction of an alignment axis, if desired.

Claims

1. A computerized method for selecting cells in a circuit design database, the circuit design database having one or more levels of hierarchy including one or more logic functions composed of one or more other logic functions and/or one or more leaf cells, the leaf cells forming the lowest level of hierarchy in the circuit design database, each of the leaf cells having one or more inputs and one or more outputs, the circuit design database having one or more nets, each of the nets for connecting an output port of a source leaf cell to an input port of one or more destination leaf cells, the computerized method comprising the steps of:

selecting one of the nets via a user input device;

identifying selected leaf cells that are connected to the selected net, wherein the selected leaf cells identified by the identifying step include only the source leaf cell that is connected to the selected net; and

selecting the identified leaf cells.

2. A method according to claim 1, wherein the selected leaf cells identified by the identifying step include all of the leaf cells that are connected to the selected net.

3. A method according to claim 1, wherein each of the leaf cells in the circuit design database is either placed or unplaced, the identifying step only identifying those leaf cells that are connected to the selected net and are placed.

4. A method according to claim 1, wherein each of the leaf cells in the circuit design database is either placed or unplaced, the identifying step only identifying those leaf cells that are connected to the selected net and are unplaced.

5. A method according to claim 1, wherein two or more of the nets are selected, and the identifying step identifies selected leaf cells that are connected to any of the selected nets.

6. A method according to claim 5, wherein the identifying step identifies only those leaf cells that are placed.

7. A method according to claim 5, wherein the identifying step identifies only those leaf cells that are unplaced.

8. A method according to claim 5, wherein the identifying step identifies only those leaf cells that are in a current context.

9. A method according to claim 5, wherein the identifying step identifies only those leaf cells that are source leaf cells for the selected nets.

10. A method according to claim 5, wherein the identifying step identifies only those leaf cells that are destination leaf cells for the selected nets.

11. A computerized method for selecting cells in a circuit design database, the circuit design database having one or more levels of hierarchy including one or more logic functions composed of one or more other logic functions and/or one or more leaf cells, the leaf cells forming the lowest level of hierarchy in the circuit design database, each of the leaf cells having one or more inputs and one or more outputs, the circuit design database having one or more nets, each of the nets for connecting an output port of a source leaf cell to an input port of one or more destination leaf cells, the computerized method comprising the steps of:

selecting one of the nets via a user input device;

identifying selected leaf cells that are connected to the selected net;

selecting the identified leaf cells; and

setting a current context.

12. A method according to claim 11, wherein the selected leaf cells identified by the identifying step include only those leaf cells that are connected to the selected net and are in the current context.

14. A method according to claim 11, wherein the selected leaf cells identified by the identifying step include only the destination leaf cells that are connected to the selected net and are in the current context.

15. A method according to claim 11, wherein each of the leaf cells in the circuit design database is either placed or unplaced, the identifying step only identifying those leaf cells that are connected to the selected net, are placed, and are in the current context.

16. A method according to claim 15, wherein the identifying step only identifies the source leaf cell that is connected to the selected net, is placed, and is in the current context, if any.

17. A method according to claim 15, wherein the identifying step only identifies the source leaf cell that is connected to the selected net, is unplaced, and is in the current context, if any.

18. A method according to claim 11, wherein each of the leaf cells in the circuit design database is either placed or unplaced, the identifying step only identifying those leaf cells that are connected to the selected net, are unplaced, and are in the current context.

13. A method according to clam 11, wherein the selected leaf cells identified by the identifying step include only the source leaf cell that is connected to the selected net and is in the current context.

19. A computerized method for selecting cells in a circuit design database, the circuit design database having one or more levels of hierarchy including one or more logic functions composed of one or more other logic functions and/or one or more leaf cells, the leaf cells forming the lowest level of hierarchy in the circuit design database, each of the leaf cells having one or more inputs and one or more outputs, the circuit design database having one or more nets, each of the nets for connecting an output port of a source leaf cell to an input port of one or more destination leaf cells, the computerized method comprising the steps of:

selecting two or more of the nets via a user input device, wherein the two or more nets are part of a vectored net;

identifying selected leaf cells that are connected to any of the selected nets; and

selecting the identified leaf cells.

20. A method according to claim 19, wherein the vectored net is selected at an interface of a selected logic function.

21. A computerized method for selecting and aligning cells in a circuit design database using a placement tool, the circuit design database having one or more levels of hierarchy including one or more logic functions composed of one or more other logic functions and/or one or more leaf cells, the leaf cells forming the lowest level of hierarchy in the circuit design database, each of the leaf cells having one or more inputs and one or more outputs, the circuit design database having one or more nets, each of the nets for connecting an output port of a source leaf cell to an input port of one or more destination leaf cells, the computerized method comprising the steps of:

selecting one or more of the nets via a user input device;

identifying and selecting selected leaf cells that are connected to the selected one or more nets, wherein the selected leaf cells identified by the identifying step include only the source leaf cell(s) that are connected to the one or more selected nets;

identifying an alignment axis; and

aligning selected ones of the identified leaf cells in the direction of the alignment axis.

22. A method according to claim 21, wherein the alignment axis is substantially horizontal.

23. A method according to claim 21, wherein the alignment axis is substantially vertical.

24. A method according to claim 21, wherein each of the leaf cells in the circuit design database is either placed or unplaced, the aligning step further including the step of placing the identified leaf cells if not already placed.

25. A method according to claim 24, wherein the unplaced identified leaf cells are first placed in a predetermined region before alignment.

26. A method according to claim 21, wherein the aligning step puts the selected identified leaf cells into a predetermined order along the alignment axis.

27. A computerized method for selecting and aligning cells in a circuit design database using a placement tool, the circuit design database having one or more levels of hierarchy including one or more logic functions composed of one or more other logic functions and/or one or more leaf cells, the leaf cells forming the lowest level of hierarchy in the circuit design database, each of the leaf cells having one or more inputs and one or more outputs, the circuit design database having one or more nets, each of the nets for connecting an output port of a source leaf cell to an input port of one or more destination leaf cells, the computerized method comprising the steps of:

selecting one or more of the nets via a user input device, wherein the one or more nets are part of a vectored net having ordered bits;

identifying and selecting selected leaf cells that are connected to the selected one or more nets;

identifying an alignment axis; and

aligning selected ones of the identified leaf cells in the direction of the alignment axis, wherein the aligning step Ruts the selected identified leaf cells into a predetermined order alone the alignment axis.

28. A method according to claim 27, wherein the aligning step orders the selected identified leaf cells in accordance with the ordered bits of the vectored net.

29. A method according to claim 27, wherein the aligning step orders the selected identified leaf cells in reverse of the ordered bits of the vectored net.

30. A method according to claim 27, wherein each of the identified leaf cells is associated with one of the ordered bits of the vectored net, and the identified leaf cells for each ordered bit has one source leaf cell and at least one destination leaf cell, the aligning step putting the source leaf cells into a predetermined order along the alignment axis, and putting the at least one destination leaf cell adjacent the corresponding source leaf cell along an axis that is perpendicular to the alignment axis.

31. A data processing system for selecting cells in a circuit design database, the circuit design database having one or more levels of hierarchy including one or more logic functions composed of one or more other logic functions and/or one or more leaf cells, the leaf cells forming the lowest level of hierarchy in the circuit design database, each of the leaf cells having one or more inputs and one or more outputs, the circuit design database having one or more nets, each of the nets for connecting an output port of a source leaf cell to an input port of one or more destination leaf cells, the data processing system comprising:

net selection means for selecting one or more of the nets of the circuit design database;

leaf cell identifying means for identifying selected leaf cells that are connected to the selected net(s), wherein the selected leaf cells identified by the identifying means include only the source leaf cell(s) that is/are connected to the selected net(s); and

leaf cell selecting means for selecting the identified leaf cells.

32. A data processing system according to claim 31, further comprising:

identifying means for identifying an alignment axis; and

aligning means for aligning the identified leaf cells in the direction of the alignment axis.

33. A computerized method for selecting cells in a circuit design database, the circuit design database having one or more levels of hierarchy including one or more logic functions composed of one or more other logic functions and/or one or more leaf cells, the leaf cells forming the lowest level of hierarchy in the circuit design database, each of the leaf cells having one or more inputs and one or more outputs, the circuit design database having one or more nets, each of the nets for connecting an output port of a source leaf cell to an input port of one or more destination leaf cells, the computerized method comprising the steps of:

selecting one of the nets via a user input device;

identifying selected leaf cells that are connected to the selected net, wherein the selected leaf cells identified by the identifying step only include one or more of the destination leaf cell(s) that is/are connected to the selected net; and

selecting the identified leaf cells.

34. A computerized method for selecting and aligning cells in a circuit design database using a placement tool, the circuit design database having one or more levels of hierarchy including one or more logic functions composed of one or more other logic functions and/or one or more leaf cells, the leaf cells forming the lowest level of hierarchy in the circuit design database, each of the leaf cells having one or more inputs and one or more outputs, the circuit design database having one or more nets, each of the nets for connecting an output port of a source leaf cell to an input port of one or more destination leaf cells, the computerized method comprising the steps of:

selecting one or more of the nets via a user input device;

identifying and selecting selected leaf cells that are connected to the selected one or more nets, wherein the selected leaf cells identified by the identifying step only include one or more of the destination leaf cell(s) that is/are connected to the one or more selected net;

identifying an alignment axis; and

aligning selected ones of the identified leaf cells in the direction of the alignment axis.

35. A data processing system for selecting cells in a circuit design database, the circuit design database having one or more levels of hierarchy including one or more logic functions composed of one or more other logic functions and/or one or more leaf cells, the leaf cells forming the lowest level of hierarchy in the circuit design database, each of the leaf cells having one or more inputs and one or more outputs, the circuit design database having one or more nets, each of the nets for connecting an output port of a source leaf cell to an input port of one or more destination leaf cells, the data processing system comprising:

net selection means for selecting one or more of the nets of the circuit design database;

leaf cell identifying means for identifying selected leaf cells that are connected to the selected net(s), wherein the selected leaf cells identified by the identifying means only include one or more of the destination leaf cell(s) that is/are connected to the one or more selected net(s); and

leaf cell selecting means for selecting the identified leaf cells.